KR920009083A - 논리회로 - Google Patents
논리회로 Download PDFInfo
- Publication number
- KR920009083A KR920009083A KR1019910018275A KR910018275A KR920009083A KR 920009083 A KR920009083 A KR 920009083A KR 1019910018275 A KR1019910018275 A KR 1019910018275A KR 910018275 A KR910018275 A KR 910018275A KR 920009083 A KR920009083 A KR 920009083A
- Authority
- KR
- South Korea
- Prior art keywords
- output
- circuit
- signal
- collector
- base
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
- H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예를 나타낸 논리회로의 회로구성도.
Claims (1)
- 복수의 입력단자에 각각 인가된 복수의 입력신호의 논리적 신호나 각 입력신호의 부정신호를 출력하는 콜렉터 도트 앤드회로와, 복수의 트랜지스터로 이루어지고, 각 트랜지스터의 에미터가 공통으로 결합됨과 동시에, 각각의 콜렉터에 상기 콜렌터 도트 앤드회로로 부터 출력되는 각 신호전압이 인가되는 차동회로와, 상기 콜렉터도트 앤드회로로 부터 출력되는 각 신호전압이 그 베이스에 각각 인가되는 복수의 트랜지스터에 의하여 구성된 복수의 에미터 플로워를 구비하고, 상기 콜렉터 도트 앤드 회로로부터 출력되는 상기 입력 신호의 부정신호가 그 베이스에 각각 인가되는 복수의 에미터플로워의 출력전극을 공통으로 결합하여 와이어드 오아회로를 형성하고, 상기 와이어드 오아회로의 출력을 상기 논리레벨 출력회로에 있어서의 각 트랜지스터 가운데, 상기 콜렉터도트 앤드회로로 부터 출력되는 상기 입력신호의 논리적 신호가 베이스에 안기되는 에미터 플로워의 출력전압을 상기 논리 레벨 출력신호에 있어서의 각 트랜지스터 가운데, 상기 콜렉터 도트 앤드회로로 부터 출력되는 입력신호의 부전 신호가 그 콜렉터에 각각 인가되는 트랜지스터의 베이스 및 출력단자에 출력하도록 한 것을 특징으로 하는 논리회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP90-288162 | 1990-10-25 | ||
JP2288162A JP2990785B2 (ja) | 1990-10-25 | 1990-10-25 | 論理回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920009083A true KR920009083A (ko) | 1992-05-28 |
KR100217875B1 KR100217875B1 (ko) | 1999-09-01 |
Family
ID=17726610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910018275A KR100217875B1 (ko) | 1990-10-25 | 1991-10-17 | 논리회로 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5170079A (ko) |
JP (1) | JP2990785B2 (ko) |
KR (1) | KR100217875B1 (ko) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69209873T2 (de) * | 1991-03-01 | 1996-10-17 | Toshiba Kawasaki Kk | Multiplizierschaltung |
EP0509585A1 (en) * | 1991-04-15 | 1992-10-21 | Koninklijke Philips Electronics N.V. | Clocked comparator with offset-voltage compensation |
WO1993017500A1 (en) * | 1992-02-20 | 1993-09-02 | Northern Telecom Limited | Differential ecl circuit |
US5287016A (en) * | 1992-04-01 | 1994-02-15 | International Business Machines Corporation | High-speed bipolar-field effect transistor (BI-FET) circuit |
JPH05315902A (ja) * | 1992-05-12 | 1993-11-26 | Nec Corp | Eclラッチ回路 |
US5459466A (en) * | 1995-02-23 | 1995-10-17 | Tektronix, Inc. | Method and apparatus for converting a thermometer code to a gray code |
US6092131A (en) * | 1997-07-28 | 2000-07-18 | Lsi Logic Corporation | Method and apparatus for terminating a bus at a device interface |
EP1473828A1 (en) * | 2003-04-30 | 2004-11-03 | STMicroelectronics S.r.l. | Phase detector and method of generating a differential signal representative of a phase-shift |
US7106104B2 (en) * | 2003-10-30 | 2006-09-12 | International Business Machines Corporation | Integrated line driver |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5925421A (ja) * | 1982-08-03 | 1984-02-09 | Toshiba Corp | 同期式論理回路 |
JPS60169216A (ja) * | 1984-02-13 | 1985-09-02 | Fujitsu Ltd | フリツプ・フロツプ回路 |
US5001361A (en) * | 1988-05-13 | 1991-03-19 | Fujitsu Limited | Master-slave flip-flop circuit |
-
1990
- 1990-10-25 JP JP2288162A patent/JP2990785B2/ja not_active Expired - Fee Related
-
1991
- 1991-10-17 KR KR1019910018275A patent/KR100217875B1/ko not_active IP Right Cessation
- 1991-10-23 US US07/781,593 patent/US5170079A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH04160923A (ja) | 1992-06-04 |
KR100217875B1 (ko) | 1999-09-01 |
JP2990785B2 (ja) | 1999-12-13 |
US5170079A (en) | 1992-12-08 |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20050531 Year of fee payment: 7 |
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LAPS | Lapse due to unpaid annual fee |