KR910001952A - 피처리체의 열처리 방법 및 그 장치 - Google Patents

피처리체의 열처리 방법 및 그 장치 Download PDF

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KR910001952A
KR910001952A KR1019900008898A KR900008898A KR910001952A KR 910001952 A KR910001952 A KR 910001952A KR 1019900008898 A KR1019900008898 A KR 1019900008898A KR 900008898 A KR900008898 A KR 900008898A KR 910001952 A KR910001952 A KR 910001952A
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South Korea
Prior art keywords
temperature
time
heat treatment
treatment method
recipe
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KR1019900008898A
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English (en)
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KR0155994B1 (ko
Inventor
키미하루 마쓰무라
히로시 사카이
마사아키 무라카이
데쓰야 오오타
지미쓰 야마구치
Original Assignee
고다까 토시오
도오교오 에레구토론 가부시끼가이샤
다카시마 히로시
도오교오 에레구토론 큐우슈우 가부시끼가이샤
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Priority claimed from JP1276564A external-priority patent/JP3018082B2/ja
Application filed by 고다까 토시오, 도오교오 에레구토론 가부시끼가이샤, 다카시마 히로시, 도오교오 에레구토론 큐우슈우 가부시끼가이샤 filed Critical 고다까 토시오
Publication of KR910001952A publication Critical patent/KR910001952A/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05D—SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
    • G05D23/00—Control of temperature
    • G05D23/19—Control of temperature characterised by the use of electric means
    • G05D23/1951—Control of temperature characterised by the use of electric means with control of the working time of a temperature controlling device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B3/00—Ohmic-resistance heating
    • H05B3/68—Heating arrangements specially adapted for cooking plates or analogous hot-plates
    • H05B3/72—Plates of sheet metal

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

내용 없음

Description

피처리체의 열처리 방법 및 그 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는, 본 발명의 열처리 방법이 이용된 레지스트 처리 시스템의 레이아웃개요를 나타내는 블록도.
제5A도는, 레지스트 처리 시스템에 포함되는 어드히죤(Adhesion)장치의 회로를 모식적으로 나타내는 회로도.
제5B도는, 콘트롤 시스템의 회로를 상세하게 나타내는 블록도.

Claims (9)

  1. 피처리체의 열처리 방법으로서; 피처리체를 소정의 열처리 온도까지 상승시키는 온도상승시 및 소정의 열처리 온도에서 하강 시키는 온도하강시의 적어도 한쪽을 포함하는 온도/시간의 지령정보를 소정의 레시피로서 미리 기억하여 놓고, 이 레시피의 온도/시간의 지령정보를 호출하고, 이것에 기초하여 도전성 박막에 의하여 피처리체를 가열하고, 피처리체의 온도를 간접 또는 직접으로 검출하고, 이 검출온도 및 레시피의 온도/시간의 지령정보에 기초하여 피처리체의 온도 상승시 및 온도하강시의 온도의 적어도 한쪽을 시간제어하여, 피처리체의 열이력(熱履歷)을 원하는 것으로 하는 방법.
  2. 제1항에 있어서, 온도상승시의 온도만을 시간제어하고, 온도하강시에는 피처리체를 방치냉각하는 피처리체의 열처리방법.
  3. 제1항에 있어서, 온도상승시 및 온도하강시의 온도를 함께 시간제어하는 피처리체의 열처리 방법.
  4. 제1항에 있어서, 반도체 웨이퍼를 어드히죤(Adhesion)처리하는 피처리체의 열처리 방법.
  5. 제1항에 있어서, 반도체 웨이퍼를 베이킹(Baking) 처리하는 피처리체의 열처리 방법.
  6. 제1항에 있어서, 레시피는, 한개의 유지온도를 가지는 가열에 대응하는 것인 피처리체의 열처리 방법.
  7. 제1항에 있어서, 래피시는, 복수의 유지온도를 포함하는 스텝가열 또는 스텝냉각에 대응하는 것인 피처리체의 열처리방법.
  8. 피처리체의 열처리 장치로서; 피처리체를 가열하기 위한 도전성 박막체(14), (132)와, 피처리체의 온도를 검출하기 위한 온도검출수단(25)과, 온도상승시 및 온도하강시의 온도의 적어도 한쪽을 포함하는 온도/시간의 지령정보를 소정의 레시피로서 미리 기억하여 놓는 기억수단(201)과, 상기 기억수단(201)으로 부터 소정의 레시피의 온도/시간의 지령정보를 호출함과 함께, 상기 온도검출수단(25)에 의한 검출온도의 신호를 받아서, 이들에 기초하여 상기 도전성막박체(14)(132)를 시간제어하는 제어수단(203)을 가지는 피처리체의 열처리장치.
  9. 제8항에 있어서, 피처리체를 강제적으로 냉각하기 위한 냉각수단(22)을 더욱 가지는 피처리체의 열처리 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900008898A 1989-06-16 1990-06-16 피처리체의 열처리 방법 및 그 장치 KR0155994B1 (ko)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP1-154119 1989-06-16
JP15411989 1989-06-16
JP154119 1989-06-16
JP1276564A JP3018082B2 (ja) 1989-10-24 1989-10-24 アドヒージョン処理方法
JP276564 1989-10-24
JP1-276564 1989-10-24

Publications (2)

Publication Number Publication Date
KR910001952A true KR910001952A (ko) 1991-01-31
KR0155994B1 KR0155994B1 (ko) 1998-12-01

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US (1) US5151871A (ko)
KR (1) KR0155994B1 (ko)

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US5151871A (en) 1992-09-29

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