KR900002770B1 - 반도체 집적회로장치 - Google Patents

반도체 집적회로장치 Download PDF

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Publication number
KR900002770B1
KR900002770B1 KR1019870004715A KR870004715A KR900002770B1 KR 900002770 B1 KR900002770 B1 KR 900002770B1 KR 1019870004715 A KR1019870004715 A KR 1019870004715A KR 870004715 A KR870004715 A KR 870004715A KR 900002770 B1 KR900002770 B1 KR 900002770B1
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KR
South Korea
Prior art keywords
scan
data
output
test
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019870004715A
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English (en)
Korean (ko)
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KR880003247A (ko
Inventor
사도루 기시다
가즈히로 사까시다
도시아끼 하니부찌
이찌로오 도미오까
다까히꼬 아라가와
Original Assignee
미쓰비시 뎅끼 가부시끼가이샤
시기모리야
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP61183687A external-priority patent/JPH0627778B2/ja
Priority claimed from JP61183682A external-priority patent/JPH0690261B2/ja
Application filed by 미쓰비시 뎅끼 가부시끼가이샤, 시기모리야 filed Critical 미쓰비시 뎅끼 가부시끼가이샤
Publication of KR880003247A publication Critical patent/KR880003247A/ko
Application granted granted Critical
Publication of KR900002770B1 publication Critical patent/KR900002770B1/ko
Expired legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
KR1019870004715A 1986-08-04 1987-05-13 반도체 집적회로장치 Expired KR900002770B1 (ko)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP61183687A JPH0627778B2 (ja) 1986-08-04 1986-08-04 半導体集積回路装置
JP61-183682 1986-08-04
JP183687 1986-08-04
JP61183682A JPH0690261B2 (ja) 1986-08-04 1986-08-04 半導体集積回路装置
JP61-183687 1986-08-04
JP183682 1986-08-04

Publications (2)

Publication Number Publication Date
KR880003247A KR880003247A (ko) 1988-05-14
KR900002770B1 true KR900002770B1 (ko) 1990-04-30

Family

ID=26502019

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870004715A Expired KR900002770B1 (ko) 1986-08-04 1987-05-13 반도체 집적회로장치

Country Status (3)

Country Link
US (1) US4864579A (enExample)
KR (1) KR900002770B1 (enExample)
DE (1) DE3725822A1 (enExample)

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JP2579327B2 (ja) * 1987-12-04 1997-02-05 富士通株式会社 半導体集積回路
US5189675A (en) * 1988-06-22 1993-02-23 Kabushiki Kaisha Toshiba Self-diagnostic circuit for logic circuit block
US6304987B1 (en) 1995-06-07 2001-10-16 Texas Instruments Incorporated Integrated test circuit
NL8900151A (nl) * 1989-01-23 1990-08-16 Philips Nv Werkwijze voor het testen van een schakeling, alsmede schakeling geschikt voor een dergelijke werkwijze.
JPH0394183A (ja) * 1989-05-19 1991-04-18 Fujitsu Ltd 半導体集積回路の試験方法及び回路
JP3005250B2 (ja) 1989-06-30 2000-01-31 テキサス インスツルメンツ インコーポレイテツド バスモニター集積回路
JP2632731B2 (ja) * 1989-08-02 1997-07-23 三菱電機株式会社 集積回路装置
JP2626920B2 (ja) * 1990-01-23 1997-07-02 三菱電機株式会社 スキャンテスト回路およびそれを用いた半導体集積回路装置
JPH0474977A (ja) * 1990-07-16 1992-03-10 Nec Corp 半導体集積回路
USRE36292E (en) * 1990-10-22 1999-09-07 Stmicroelectronics, Inc. Operational analysis device of the scan path type having a single scanning clock and a single output phase for an integrated circuit
IT1246301B (it) * 1990-10-22 1994-11-17 St Microelectronics Srl Dispositivo di analisi operativa di tipo scan path a singolo clock di scansione e singola fase di uscita per circuito integrato.
US5166604A (en) * 1990-11-13 1992-11-24 Altera Corporation Methods and apparatus for facilitating scan testing of asynchronous logic circuitry
JP2770617B2 (ja) * 1991-09-05 1998-07-02 日本電気株式会社 テスト回路
US20030133955A1 (en) * 1993-02-22 2003-07-17 American Bioscience, Inc. Methods and compositions useful for administration of chemotherapeutic agents
JPH06249919A (ja) * 1993-03-01 1994-09-09 Fujitsu Ltd 半導体集積回路装置の端子間接続試験方法
US5864565A (en) 1993-06-15 1999-01-26 Micron Technology, Inc. Semiconductor integrated circuit having compression circuitry for compressing test data, and the test system and method for utilizing the semiconductor integrated circuit
JP2746076B2 (ja) * 1993-09-02 1998-04-28 日本電気株式会社 半導体集積回路、その設計方法およびそのテスト方法
JP2768910B2 (ja) * 1995-02-27 1998-06-25 日本モトローラ株式会社 半導体集積装置におけるスキャンテスト回路
US5656953A (en) * 1995-05-31 1997-08-12 Texas Instruments Incorporated Low overhead memory designs for IC terminals
US5764079A (en) * 1996-03-11 1998-06-09 Altera Corporation Sample and load scheme for observability of internal nodes in a PLD
JP3039362B2 (ja) * 1996-03-28 2000-05-08 日本電気株式会社 半導体集積論理回路のテストパターン作成方法
US5867036A (en) * 1996-05-29 1999-02-02 Lsi Logic Corporation Domino scan architecture and domino scan flip-flop for the testing of domino and hybrid CMOS circuits
US6205566B1 (en) * 1997-07-23 2001-03-20 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit, method for designing the same, and storage medium where design program for semiconductor integrated circuit is stored
US6202185B1 (en) * 1997-10-15 2001-03-13 Altera Corporation Methods and apparatus for facilitating scan testing of circuitry
US6157210A (en) 1997-10-16 2000-12-05 Altera Corporation Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits
US6381704B1 (en) * 1998-01-29 2002-04-30 Texas Instruments Incorporated Method and apparatus for altering timing relationships of non-overlapping clock signals in a microprocessor
US6408413B1 (en) 1998-02-18 2002-06-18 Texas Instruments Incorporated Hierarchical access of test access ports in embedded core integrated circuits
US6405335B1 (en) 1998-02-25 2002-06-11 Texas Instruments Incorporated Position independent testing of circuits
US7058862B2 (en) 2000-05-26 2006-06-06 Texas Instruments Incorporated Selecting different 1149.1 TAP domains from update-IR state
US6728915B2 (en) 2000-01-10 2004-04-27 Texas Instruments Incorporated IC with shared scan cells selectively connected in scan path
US6769080B2 (en) 2000-03-09 2004-07-27 Texas Instruments Incorporated Scan circuit low power adapter with counter
JP2004069642A (ja) * 2002-08-09 2004-03-04 Renesas Technology Corp 半導体集積回路装置
KR101047533B1 (ko) * 2007-02-23 2011-07-08 삼성전자주식회사 멀티 페이즈 스캔체인을 구동하는 시스템온칩과 그 방법
US7673206B2 (en) * 2007-09-14 2010-03-02 Tilera Corporation Method and system for routing scan chains in an array of processor resources
KR102257380B1 (ko) * 2014-12-22 2021-05-31 삼성전자주식회사 온칩 클록 컨트롤러를 포함하는 시스템온칩 및 이를 포함하는 모바일 장치

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US4063080A (en) * 1976-06-30 1977-12-13 International Business Machines Corporation Method of propagation delay testing a level sensitive array logic system
JPS54121036A (en) * 1978-03-13 1979-09-19 Cho Lsi Gijutsu Kenkyu Kumiai Method of testing function of logic circuit
US4244048A (en) * 1978-12-29 1981-01-06 International Business Machines Corporation Chip and wafer configuration and testing method for large-scale-integrated circuits
JPS5674668A (en) * 1979-11-22 1981-06-20 Nec Corp Logical device
DE3029883A1 (de) * 1980-08-07 1982-03-11 Ibm Deutschland Gmbh, 7000 Stuttgart Schieberegister fuer pruef- und test-zwecke
US4493077A (en) * 1982-09-09 1985-01-08 At&T Laboratories Scan testable integrated circuit
US4513418A (en) * 1982-11-08 1985-04-23 International Business Machines Corporation Simultaneous self-testing system
US4580137A (en) * 1983-08-29 1986-04-01 International Business Machines Corporation LSSD-testable D-type edge-trigger-operable latch with overriding set/reset asynchronous control
US4554664A (en) * 1983-10-06 1985-11-19 Sperry Corporation Static memory cell with dynamic scan test latch
DE3373729D1 (en) * 1983-12-08 1987-10-22 Ibm Deutschland Testing and diagnostic device for a digital calculator
AU569401B2 (en) * 1984-06-22 1988-01-28 Royal Melbourne Institute Of Technology Limited Slurry viscosity control
JPH0772744B2 (ja) * 1984-09-04 1995-08-02 株式会社日立製作所 半導体集積回路装置
US4703257A (en) * 1984-12-24 1987-10-27 Hitachi, Ltd. Logic circuit having a test data scan circuit
US4752729A (en) * 1986-07-01 1988-06-21 Texas Instruments Incorporated Test circuit for VSLI integrated circuits
JPH05228614A (ja) * 1991-07-04 1993-09-07 Kubota Corp 遠心鋳鋼管内面のヒケ巣除去法
JPH05274668A (ja) * 1992-03-25 1993-10-22 Taiyo Yuden Co Ltd 磁性薄膜の製法

Also Published As

Publication number Publication date
DE3725822A1 (de) 1988-02-18
DE3725822C2 (enExample) 1990-09-20
KR880003247A (ko) 1988-05-14
US4864579A (en) 1989-09-05

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