JPS5674668A - Logical device - Google Patents

Logical device

Info

Publication number
JPS5674668A
JPS5674668A JP15153379A JP15153379A JPS5674668A JP S5674668 A JPS5674668 A JP S5674668A JP 15153379 A JP15153379 A JP 15153379A JP 15153379 A JP15153379 A JP 15153379A JP S5674668 A JPS5674668 A JP S5674668A
Authority
JP
Japan
Prior art keywords
scanning
state
sequential circuit
asynchronous sequential
keep
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15153379A
Other languages
Japanese (ja)
Inventor
Hideo Shibano
Shigehiro Funatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15153379A priority Critical patent/JPS5674668A/en
Publication of JPS5674668A publication Critical patent/JPS5674668A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Logic Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE: To test the titled device easily by maintaining a state of the asynchronous sequential circuit having no scanning state, in the course of scanning operation.
CONSTITUTION: The scanning lock is made to proceed in order by providing a scanning mode signal from the scanning control terminal 1 and scanning in a data from the scanning-in terminal 2. The scanning-in data is shifted in order by the next FF's 9W16. On the other hand, the output values of the FF's 8, 9 and 10 are held in the course of scanning-in, by operation of the control gates 20W22, and the output value of the merging circuit 17 becomes a through state. As a result, the contents of the inside of the asynchronous sequential circuit 18 are able to keep the state before scanning-in, in spite of the scanning operation. In case of scanning-out, too, the processing is performed in the same way, and the inside of the asynchronous sequential circuit 18 is able to keep the state before scanning-out, by operation of the control gates 20W22.
COPYRIGHT: (C)1981,JPO&Japio
JP15153379A 1979-11-22 1979-11-22 Logical device Pending JPS5674668A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15153379A JPS5674668A (en) 1979-11-22 1979-11-22 Logical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15153379A JPS5674668A (en) 1979-11-22 1979-11-22 Logical device

Publications (1)

Publication Number Publication Date
JPS5674668A true JPS5674668A (en) 1981-06-20

Family

ID=15520588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15153379A Pending JPS5674668A (en) 1979-11-22 1979-11-22 Logical device

Country Status (1)

Country Link
JP (1) JPS5674668A (en)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6162878A (en) * 1984-09-04 1986-03-31 Hitachi Ltd Semiconductor integrated circuit device
JPS61251229A (en) * 1985-04-27 1986-11-08 Nec Corp Scan system logic integrated circuit
JPS6291871A (en) * 1985-10-18 1987-04-27 Fujitsu Ltd Diagnostic system for synchronizing and asynchronizing circuits
JPS62110173A (en) * 1985-11-07 1987-05-21 Nec Corp Semiconductive integrated circuit
JPS62126367A (en) * 1985-11-26 1987-06-08 Nec Corp Logical integrated circuit
DE3722615A1 (en) * 1986-08-04 1988-02-18 Mitsubishi Electric Corp INTEGRATED SEMICONDUCTOR CIRCUIT ARRANGEMENT
DE3725821A1 (en) * 1986-08-04 1988-02-18 Mitsubishi Electric Corp INTEGRATED SEMICONDUCTOR SWITCHING DEVICE WITH TEST FUNCTION
DE3725823A1 (en) * 1986-08-04 1988-02-18 Mitsubishi Electric Corp INTEGRATED SEMICONDUCTOR SWITCHING DEVICE
JPS63153482A (en) * 1986-12-17 1988-06-25 Pfu Ltd Test system for integrated circuit
JPS63182585A (en) * 1987-01-26 1988-07-27 Toshiba Corp Logic circuit equipped with test facilitating function
JPS6483169A (en) * 1987-09-25 1989-03-28 Mitsubishi Electric Corp Integrated circuit device
JPS6491074A (en) * 1987-10-02 1989-04-10 Hitachi Ltd Memory-contained logic lsi and testing thereof
DE3838940A1 (en) * 1987-11-17 1989-06-01 Mitsubishi Electric Corp CIRCUIT WITH TEST FUNCTION CIRCUIT
US4864579A (en) * 1986-08-04 1989-09-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device
JPH0290075A (en) * 1987-10-07 1990-03-29 Xilinx Inc System for scanning test of logical circuit
DE4100671A1 (en) * 1990-01-23 1991-08-01 Mitsubishi Electric Corp SCANNING AND USE OF THE SCANNING CIRCUIT IN AN INTEGRATED SEMICONDUCTOR CIRCUIT

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6162878A (en) * 1984-09-04 1986-03-31 Hitachi Ltd Semiconductor integrated circuit device
JPH0433167B2 (en) * 1985-04-27 1992-06-02 Nippon Electric Co
JPS61251229A (en) * 1985-04-27 1986-11-08 Nec Corp Scan system logic integrated circuit
JPS6291871A (en) * 1985-10-18 1987-04-27 Fujitsu Ltd Diagnostic system for synchronizing and asynchronizing circuits
JPS62110173A (en) * 1985-11-07 1987-05-21 Nec Corp Semiconductive integrated circuit
JPS62126367A (en) * 1985-11-26 1987-06-08 Nec Corp Logical integrated circuit
DE3725821A1 (en) * 1986-08-04 1988-02-18 Mitsubishi Electric Corp INTEGRATED SEMICONDUCTOR SWITCHING DEVICE WITH TEST FUNCTION
DE3725823A1 (en) * 1986-08-04 1988-02-18 Mitsubishi Electric Corp INTEGRATED SEMICONDUCTOR SWITCHING DEVICE
US4864579A (en) * 1986-08-04 1989-09-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device
DE3722615A1 (en) * 1986-08-04 1988-02-18 Mitsubishi Electric Corp INTEGRATED SEMICONDUCTOR CIRCUIT ARRANGEMENT
US4870345A (en) * 1986-08-04 1989-09-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor intergrated circuit device
JPS63153482A (en) * 1986-12-17 1988-06-25 Pfu Ltd Test system for integrated circuit
JPH0693004B2 (en) * 1986-12-17 1994-11-16 株式会社ピーエフユー Integrated circuit test method
JPS63182585A (en) * 1987-01-26 1988-07-27 Toshiba Corp Logic circuit equipped with test facilitating function
DE3832113A1 (en) * 1987-09-25 1989-04-13 Mitsubishi Electric Corp CIRCUIT TO TEST INTEGRATED CIRCUIT DEVICES
US4995039A (en) * 1987-09-25 1991-02-19 Mitsubishi Denki Kabushiki Kaisha Circuit for transparent scan path testing of integrated circuit devices
JPS6483169A (en) * 1987-09-25 1989-03-28 Mitsubishi Electric Corp Integrated circuit device
JPS6491074A (en) * 1987-10-02 1989-04-10 Hitachi Ltd Memory-contained logic lsi and testing thereof
JP2521774B2 (en) * 1987-10-02 1996-08-07 株式会社日立製作所 Memory-embedded logic LSI and method for testing the LSI
JPH0290075A (en) * 1987-10-07 1990-03-29 Xilinx Inc System for scanning test of logical circuit
DE3838940A1 (en) * 1987-11-17 1989-06-01 Mitsubishi Electric Corp CIRCUIT WITH TEST FUNCTION CIRCUIT
US4913557A (en) * 1987-11-17 1990-04-03 Mitsubishi Denki Kabushiki Kaisha Intergrated logic circuit having testing function circuit formed integrally therewith
DE4100671A1 (en) * 1990-01-23 1991-08-01 Mitsubishi Electric Corp SCANNING AND USE OF THE SCANNING CIRCUIT IN AN INTEGRATED SEMICONDUCTOR CIRCUIT
US5130647A (en) * 1990-01-23 1992-07-14 Mitsubishi Denki Kabushiki Kaisha Scan test circuit and semiconductor integrated circuit device using the same

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