JPS5438732A - Input/output order accepting system - Google Patents

Input/output order accepting system

Info

Publication number
JPS5438732A
JPS5438732A JP10491877A JP10491877A JPS5438732A JP S5438732 A JPS5438732 A JP S5438732A JP 10491877 A JP10491877 A JP 10491877A JP 10491877 A JP10491877 A JP 10491877A JP S5438732 A JPS5438732 A JP S5438732A
Authority
JP
Japan
Prior art keywords
input
output order
order accepting
accepting system
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10491877A
Other languages
Japanese (ja)
Inventor
Kazuo Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10491877A priority Critical patent/JPS5438732A/en
Publication of JPS5438732A publication Critical patent/JPS5438732A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce greatly the number of IC used in the input/output control unit and thus to realize a miniature size and low cost for the circuit, by using the first-in-first-out memory to memorize the input/output order.
COPYRIGHT: (C)1979,JPO&Japio
JP10491877A 1977-09-02 1977-09-02 Input/output order accepting system Pending JPS5438732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10491877A JPS5438732A (en) 1977-09-02 1977-09-02 Input/output order accepting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10491877A JPS5438732A (en) 1977-09-02 1977-09-02 Input/output order accepting system

Publications (1)

Publication Number Publication Date
JPS5438732A true JPS5438732A (en) 1979-03-23

Family

ID=14393474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10491877A Pending JPS5438732A (en) 1977-09-02 1977-09-02 Input/output order accepting system

Country Status (1)

Country Link
JP (1) JPS5438732A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6240561A (en) * 1985-08-19 1987-02-21 Nec Corp Data communication control device
JPS6240563A (en) * 1985-08-19 1987-02-21 Fujitsu Ltd Channel control device
JPS62120560A (en) * 1985-11-20 1987-06-01 Nec Corp Peripheral controller
JPH01103734A (en) * 1987-10-16 1989-04-20 Hitachi Ltd Disk controller

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503547A (en) * 1973-05-14 1975-01-14
JPS5164340A (en) * 1975-10-23 1976-06-03 Nippon Electric Co NYUSHUTSURYOKUSHORISOCHI

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS503547A (en) * 1973-05-14 1975-01-14
JPS5164340A (en) * 1975-10-23 1976-06-03 Nippon Electric Co NYUSHUTSURYOKUSHORISOCHI

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6240561A (en) * 1985-08-19 1987-02-21 Nec Corp Data communication control device
JPS6240563A (en) * 1985-08-19 1987-02-21 Fujitsu Ltd Channel control device
JPS62120560A (en) * 1985-11-20 1987-06-01 Nec Corp Peripheral controller
JPH01103734A (en) * 1987-10-16 1989-04-20 Hitachi Ltd Disk controller

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