KR890005884A - 바이폴라 트랜지스터의 제조방법 - Google Patents
바이폴라 트랜지스터의 제조방법 Download PDFInfo
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- KR890005884A KR890005884A KR870010712A KR870010712A KR890005884A KR 890005884 A KR890005884 A KR 890005884A KR 870010712 A KR870010712 A KR 870010712A KR 870010712 A KR870010712 A KR 870010712A KR 890005884 A KR890005884 A KR 890005884A
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- substrate
- region
- bipolar transistor
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- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000000758 substrate Substances 0.000 claims 30
- 239000004065 semiconductor Substances 0.000 claims 7
- 238000005530 etching Methods 0.000 claims 4
- 238000000034 method Methods 0.000 claims 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 4
- 238000005468 ion implantation Methods 0.000 claims 3
- 150000002500 ions Chemical class 0.000 claims 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 239000004020 conductor Substances 0.000 claims 2
- 239000012535 impurity Substances 0.000 claims 2
- 150000004767 nitrides Chemical class 0.000 claims 2
- 229910052710 silicon Inorganic materials 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- 230000003213 activating effect Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8224—Bipolar technology comprising a combination of vertical and lateral transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/6625—Lateral transistors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/01—Bipolar transistors-ion implantation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/096—Lateral transistor
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래 수평 바이폴라 트랜지스터의 개략도.
제2 (A)-(I)도는 본 발명에 따른 제조 공정도.
Claims (4)
- 제 1 도전형의 반도체기판과, 상기 기판상에 제 2 도전형의 콜렉터 및 에미터영역과, 제 1 도전형의 베이스영역을 구비하는 반도체 장치의 에미터 및 콜렉터 영역의 제조방법이 하기의 공정으로 이루어짐을 특징으로 하는 수평 바이폴라 트랜지스터의 제조방법.(a) 상기 기판상의 소정부분에 에미터 및 콜렉터가 형성될 제 1 기판영역과 상기 제 1 기판영역과 이격하여 형성된 베이스 접속영역이 형성될 제 2 기판영역을 형성하고 상기 기판상부 전면에 질화막층을 형성하고 제 2 기판영역에 베이스영역 접속창을 형성하는 공정.(b) 기판전면에 도우핑된 다결정 실리콘층을 형성하고 필드평판과 베이스 접속부를 형성하기 위해 상기 다결정 실리콘층을 에칭하는 공정.(c) 상기 (b)공정에서 형성된 필드평판을 이온주입 마스크로하여 에미터 및 콜렉터 영역 형성을 위한 제 2 도전형의 이온주입을 하는 공정.(d) 기판전면에 산화막층을 형성한후 상기(c)정에서 주입된 불순물들을 활성화하기 위한 열처리를 하는 공정.(e) 에미터영역, 콜렉터영역 및 베이스영역의 접속창을 형성하기 위하여 상기 산화막층을 에칭하는 공정.(f) 상기 접속창을 통해 도체층에 접속하는 공정.
- 제 1 항에 있어서, 제 1 도 전형의 반도체기판이 N형 실리콘 반도체기판임을 특징으로 하는 수평 바이폴라 트랜지스터의 제조방법.
- 제 1 도 전형의 반도체기판과, 상기 기판상에 제 1 바이폴라 트랜지스터와 제 2 바이폴라 트랜지스터를 구비한 반도체 장치의 제 1 바이폴라 트랜지스터의 에미터 및 베이스영역과 제 2 바이폴라 트랜지스터의 에미터 및 콜렉터영역의 제조방법이 하기의 공정으로 이루어짐을 특징으로 하는 바이폴라 트랜지스터의 제조방법.(a) 상기 기판상의 소정부분에 제 1 바이폴라 트랜지스터의 에미터 및 베이스가 형성될 제 1 기판영역과 제 2 바이폴라 트랜지스터의 에미터 및 콜렉터가 형성될 제 3 기판영역과, 상기 제 1 및 제 3 기판영역과 이격하여 형성된 제 1 바이폴라 트랜지스터의 콜렉터 접속을 위한 제 2 기판영역 및 제 2 바이폴라 트랜지스터의 베이스 접속을 위한 제 4 기판영역을 형성하는 공정.(b) 제 1 바이폴라 트랜지스터의 제 1 베이스를 형성하기 위해 제 1 기판영역 전면에 제 2 도전형의 이온주입을 하는 공정.(c) 기판전면에 질화막층을 형성한후 제 1 기판영역에 제 1 바이폴라 트랜지스터의 에미터 접속창을 형성하고 제 2 및 제 4 기판 영역에 제 1 바이폴라 트랜지스터의 콜렉터 접속창 및 제 2 바이폴라 베이스 접속창을 형성하는 공정.(d) 기판전면에 도우핑된 다결정 실리콘층을 형성하고 제 1 바이폴라 트랜지스터의 에미터 접속부 및 콜렉터접속부와 제 2 바이폴라 트랜지스터의 필드평판 및 베이스 접속부를 형성하기 위해 상기 다결정 실리콘층을 에칭하는 공정.(e) 상기 (d)공정에서 형성된 제 1 기판영역의 에미터 접속부와 제 3 기판영역의 필드평판을 이온주입 마스크로하여 제 1 바이폴라 트랜지스터의 제 2 베이스영역과 제 2 바이폴라 트랜지스터의 에미터 및 콜렉터영역을 형성하기 위한 이온주입을 하는 공정.(f) 기판전면에 산화막층을 형성한후 제 1 바이폴라 트랜지스터의 에미터영역을 형성하고 제 2 바이폴라 트랜지스터의 에미터 및 콜렉터영역을 형성하기 위하여 상기 이온주입된 불순물들을 활성화 하는 공정.(g) 제1 및 제 2 바이폴라 트랜지스터의 에미터영역, 베이스영역 및 콜렉터영역의 접속창을 형성하기 위하여 상기 산화막층을 에칭하는 공정.(h) 상기 접속창을 통해 도체층에 접속하는 공정.
- 제 3 항에 있어서, 제 1 도 전형의 반도체기판이 N형 실리콘기판임을 특징으로 하는 바이폴라 트랜지스터의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870010712A KR900005123B1 (ko) | 1987-09-26 | 1987-09-26 | 바이폴라 트랜지스터의 제조방법 |
JP63240598A JPH01165168A (ja) | 1987-09-26 | 1988-09-26 | バイポーラトランジスタの製造方法 |
US07/249,310 US4978630A (en) | 1987-09-26 | 1988-09-26 | Fabrication method of bipolar transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870010712A KR900005123B1 (ko) | 1987-09-26 | 1987-09-26 | 바이폴라 트랜지스터의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890005884A true KR890005884A (ko) | 1989-05-17 |
KR900005123B1 KR900005123B1 (ko) | 1990-07-19 |
Family
ID=19264770
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870010712A KR900005123B1 (ko) | 1987-09-26 | 1987-09-26 | 바이폴라 트랜지스터의 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US4978630A (ko) |
JP (1) | JPH01165168A (ko) |
KR (1) | KR900005123B1 (ko) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5318917A (en) * | 1988-11-04 | 1994-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating semiconductor device |
US5204274A (en) * | 1988-11-04 | 1993-04-20 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating semiconductor device |
JPH0817180B2 (ja) * | 1989-06-27 | 1996-02-21 | 株式会社東芝 | 半導体装置の製造方法 |
JPH0828379B2 (ja) * | 1990-05-28 | 1996-03-21 | 株式会社東芝 | 半導体装置の製造方法 |
US5151378A (en) * | 1991-06-18 | 1992-09-29 | National Semiconductor Corporation | Self-aligned planar monolithic integrated circuit vertical transistor process |
US5187109A (en) * | 1991-07-19 | 1993-02-16 | International Business Machines Corporation | Lateral bipolar transistor and method of making the same |
FR2687843A1 (fr) * | 1992-02-24 | 1993-08-27 | Motorola Semiconducteurs | Transistor bipolaire lateral pnp et procede de fabrication. |
US5323050A (en) * | 1993-06-01 | 1994-06-21 | Motorola, Inc. | Collector arrangement for magnetotransistor |
US5578873A (en) * | 1994-10-12 | 1996-11-26 | Micron Technology, Inc. | Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer |
US5926697A (en) * | 1997-10-09 | 1999-07-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a moisture guard ring for integrated circuit applications |
US6242313B1 (en) | 1999-09-03 | 2001-06-05 | Taiwan Semiconductor Manufacturing Company | Use of polysilicon field plates to improve high voltage bipolar device breakdown voltage |
US8486797B1 (en) | 2012-05-25 | 2013-07-16 | International Business Machines Corporation | Bipolar junction transistor with epitaxial contacts |
US10290714B2 (en) * | 2016-05-31 | 2019-05-14 | Taiwan Semiconductor Manufacturing Company Ltd. | Transistor structure with field plate for reducing area thereof |
CN107946355B (zh) * | 2017-03-02 | 2024-04-05 | 重庆中科渝芯电子有限公司 | 一种横向高压双极结型晶体管及其制造方法 |
CN107946356B (zh) * | 2017-03-02 | 2024-04-09 | 重庆中科渝芯电子有限公司 | 一种横向高压功率双极结型晶体管及其制造方法 |
KR102220032B1 (ko) * | 2018-08-20 | 2021-02-25 | 한국과학기술원 | 폴리 실리콘 이미터 층이 삽입된 2-단자 바이리스터 및 그 제조 방법 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3915767A (en) * | 1973-02-05 | 1975-10-28 | Honeywell Inc | Rapidly responsive transistor with narrowed base |
JPS55156366A (en) * | 1979-05-24 | 1980-12-05 | Toshiba Corp | Semiconductor device |
JPS5989457A (ja) * | 1982-11-15 | 1984-05-23 | Hitachi Ltd | 半導体装置の製造方法 |
JPS59161067A (ja) * | 1983-03-04 | 1984-09-11 | Hitachi Micro Comput Eng Ltd | バイポ−ラ型半導体装置の製造方法 |
JPS59163864A (ja) * | 1983-03-09 | 1984-09-14 | Fujitsu Ltd | 半導体装置 |
JPS59207659A (ja) * | 1983-05-11 | 1984-11-24 | Hitachi Ltd | 半導体装置の製造方法 |
US4663825A (en) * | 1984-09-27 | 1987-05-12 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
KR890004495B1 (ko) * | 1984-11-29 | 1989-11-06 | 가부시끼가이샤 도오시바 | 반도체 장치 |
JPS61218161A (ja) * | 1985-03-25 | 1986-09-27 | Hitachi Ltd | 半導体装置とその製造法 |
US4682409A (en) * | 1985-06-21 | 1987-07-28 | Advanced Micro Devices, Inc. | Fast bipolar transistor for integrated circuit structure and method for forming same |
JPS6286753A (ja) * | 1985-10-12 | 1987-04-21 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US4669177A (en) * | 1985-10-28 | 1987-06-02 | Texas Instruments Incorporated | Process for making a lateral bipolar transistor in a standard CSAG process |
US4755476A (en) * | 1985-12-17 | 1988-07-05 | Siemens Aktiengesellschaft | Process for the production of self-adjusted bipolar transistor structures having a reduced extrinsic base resistance |
US4721685A (en) * | 1986-04-18 | 1988-01-26 | Sperry Corporation | Single layer poly fabrication method and device with shallow emitter/base junctions and optimized channel stopper |
JPS62293767A (ja) * | 1986-06-13 | 1987-12-21 | Fuji Electric Co Ltd | 半導体集積回路 |
-
1987
- 1987-09-26 KR KR1019870010712A patent/KR900005123B1/ko not_active IP Right Cessation
-
1988
- 1988-09-26 JP JP63240598A patent/JPH01165168A/ja active Pending
- 1988-09-26 US US07/249,310 patent/US4978630A/en not_active Expired - Lifetime
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Publication number | Publication date |
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JPH01165168A (ja) | 1989-06-29 |
KR900005123B1 (ko) | 1990-07-19 |
US4978630A (en) | 1990-12-18 |
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