KR890004402A - 실리콘 함유 금속층을 선택적으로 형성하는 방법 - Google Patents

실리콘 함유 금속층을 선택적으로 형성하는 방법

Info

Publication number
KR890004402A
KR890004402A KR1019880010777A KR880010777A KR890004402A KR 890004402 A KR890004402 A KR 890004402A KR 1019880010777 A KR1019880010777 A KR 1019880010777A KR 880010777 A KR880010777 A KR 880010777A KR 890004402 A KR890004402 A KR 890004402A
Authority
KR
South Korea
Prior art keywords
silicon
metal layer
containing metal
selectively forming
selectively
Prior art date
Application number
KR1019880010777A
Other languages
English (en)
Other versions
KR910009316B1 (ko
Inventor
다까유끼 오오바
Original Assignee
후지쓰 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쓰 가부시끼가이샤 filed Critical 후지쓰 가부시끼가이샤
Publication of KR890004402A publication Critical patent/KR890004402A/ko
Application granted granted Critical
Publication of KR910009316B1 publication Critical patent/KR910009316B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562Selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/019Contacts of silicides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/147Silicides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019880010777A 1987-08-24 1988-08-24 실리콘 함유 금속층을 선택적으로 형성하는 방법 KR910009316B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP20953487 1987-08-24
JP?62-209534 1987-08-24
JP5882188 1988-03-11
JP?63-058821 1988-03-11

Publications (2)

Publication Number Publication Date
KR890004402A true KR890004402A (ko) 1989-04-21
KR910009316B1 KR910009316B1 (ko) 1991-11-09

Family

ID=26399829

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880010777A KR910009316B1 (ko) 1987-08-24 1988-08-24 실리콘 함유 금속층을 선택적으로 형성하는 방법

Country Status (3)

Country Link
US (1) US4902645A (ko)
EP (1) EP0305143B1 (ko)
KR (1) KR910009316B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230019219A (ko) * 2017-05-15 2023-02-07 도쿄엘렉트론가부시키가이샤 첨단 패턴화 적용을 위한 원위치의 선택적 증착 및 에칭

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EP0370775B1 (en) * 1988-11-21 1996-06-12 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5202287A (en) * 1989-01-06 1993-04-13 International Business Machines Corporation Method for a two step selective deposition of refractory metals utilizing SiH4 reduction and H2 reduction
US5084417A (en) * 1989-01-06 1992-01-28 International Business Machines Corporation Method for selective deposition of refractory metals on silicon substrates and device formed thereby
US5221853A (en) * 1989-01-06 1993-06-22 International Business Machines Corporation MOSFET with a refractory metal film, a silicide film and a nitride film formed on and in contact with a source, drain and gate region
JP2765967B2 (ja) * 1989-07-26 1998-06-18 沖電気工業株式会社 半導体素子
DE69026669T2 (de) * 1989-09-26 1996-10-17 Canon Kk Verfahren zur Herstellung einer abgeschiedenen Schicht unter Verwendung von Alkylaluminiumhydrid und Verfahren zur Herstellung eines Halbleiterbauelements
JP2721023B2 (ja) * 1989-09-26 1998-03-04 キヤノン株式会社 堆積膜形成法
KR930000309B1 (ko) * 1989-11-22 1993-01-15 삼성전자 주식회사 반도체 장치의 제조방법
EP1069610A2 (en) * 1990-01-08 2001-01-17 Lsi Logic Corporation Refractory metal deposition process for low contact resistivity to silicon and corresponding apparatus
EP0443277B1 (en) * 1990-02-20 1998-12-30 L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude Metallized ceramic body and method to make the same
US4966869A (en) * 1990-05-04 1990-10-30 Spectrum Cvd, Inc. Tungsten disilicide CVD
KR930002673B1 (ko) * 1990-07-05 1993-04-07 삼성전자 주식회사 고융점금속 성장방법
US5077236A (en) * 1990-07-02 1991-12-31 Samsung Electronics Co., Ltd. Method of making a pattern of tungsten interconnection
DE4021516A1 (de) * 1990-07-06 1992-01-16 Samsung Electronics Co Ltd Verfahren zum differenzierten aufwachsen von wolfram fuer die selektive chemische abscheidung aus der gasphase
US5064686A (en) * 1990-10-29 1991-11-12 Olin Corporation Sub-valent molybdenum, tungsten, and chromium amides as sources for thermal chemical vapor deposition of metal-containing films
JPH04242088A (ja) * 1991-01-16 1992-08-28 Nec Corp Icソケット
JPH05129230A (ja) * 1991-10-31 1993-05-25 Fujitsu Ltd タングステン膜の形成方法
US5231056A (en) * 1992-01-15 1993-07-27 Micron Technology, Inc. Tungsten silicide (WSix) deposition process for semiconductor manufacture
US5300813A (en) * 1992-02-26 1994-04-05 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
GB9219281D0 (en) * 1992-09-11 1992-10-28 Inmos Ltd Manufacture of semiconductor devices
GB9219267D0 (en) * 1992-09-11 1992-10-28 Inmos Ltd Manufacture of semiconductor devices
KR960006436B1 (ko) * 1992-12-17 1996-05-15 삼성전자주식회사 반도체장치의 콘택플러그 형성방법
KR960008550B1 (en) * 1992-12-31 1996-06-28 Hyundai Electronics Ind Contact plug manufacturing method using tungsten
JPH07115130A (ja) * 1993-10-14 1995-05-02 Toshiba Corp 半導体装置の製造方法
JP3294413B2 (ja) * 1993-12-28 2002-06-24 富士通株式会社 半導体装置の製造方法及び製造装置
JPH07263680A (ja) * 1994-03-24 1995-10-13 Hitachi Ltd 半導体装置の製造方法
USRE39895E1 (en) 1994-06-13 2007-10-23 Renesas Technology Corp. Semiconductor integrated circuit arrangement fabrication method
EP0704551B1 (en) * 1994-09-27 2000-09-06 Applied Materials, Inc. Method of processing a substrate in a vacuum processing chamber
US5950099A (en) * 1996-04-09 1999-09-07 Kabushiki Kaisha Toshiba Method of forming an interconnect
JPH1064848A (ja) * 1996-08-13 1998-03-06 Toshiba Corp 半導体装置の製造装置および製造方法
EP0841690B1 (en) * 1996-11-12 2006-03-01 Samsung Electronics Co., Ltd. Tungsten nitride (WNx) layer manufacturing method and metal wiring manufacturing method
US6452276B1 (en) * 1998-04-30 2002-09-17 International Business Machines Corporation Ultra thin, single phase, diffusion barrier for metal conductors
US6255192B1 (en) 1998-09-29 2001-07-03 Conexant Systems, Inc. Methods for barrier layer formation
JP3403357B2 (ja) 1999-06-03 2003-05-06 株式会社半導体先端テクノロジーズ 配線形成方法及び配線形成装置
US7026219B2 (en) * 2001-02-12 2006-04-11 Asm America, Inc. Integration of high k gate dielectric
EP1421607A2 (en) * 2001-02-12 2004-05-26 ASM America, Inc. Improved process for deposition of semiconductor films
US6545287B2 (en) * 2001-09-07 2003-04-08 Intel Corporation Using selective deposition to form phase-change memory cells
US7297641B2 (en) * 2002-07-19 2007-11-20 Asm America, Inc. Method to form ultra high quality silicon-containing compound layers
US7186630B2 (en) * 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
RU2374703C2 (ru) * 2003-10-30 2009-11-27 Конинклейке Филипс Электроникс Н.В. Кодирование или декодирование аудиосигнала
JP2005149767A (ja) * 2003-11-11 2005-06-09 Pioneer Electronic Corp 薄膜形成方法
US7772097B2 (en) * 2007-11-05 2010-08-10 Asm America, Inc. Methods of selectively depositing silicon-containing films
KR20130021026A (ko) 2011-08-22 2013-03-05 엘지이노텍 주식회사 웨이퍼 표면 처리 방법
JP7362258B2 (ja) * 2019-02-08 2023-10-17 東京エレクトロン株式会社 基板処理方法及び成膜システム
CN113316836B (zh) * 2019-03-20 2024-04-09 株式会社国际电气 半导体器件的制造方法、衬底处理方法、衬底处理装置及记录介质
US11756790B2 (en) 2021-03-09 2023-09-12 Tokyo Electron Limited Method for patterning a dielectric layer

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US4218291A (en) * 1978-02-28 1980-08-19 Vlsi Technology Research Association Process for forming metal and metal silicide films
JPS5972132A (ja) * 1982-10-19 1984-04-24 Toshiba Corp 金属及び金属シリサイド膜の形成方法
JPS60115245A (ja) * 1983-11-28 1985-06-21 Toshiba Corp 半導体装置の製造方法
JPH0770502B2 (ja) * 1985-04-26 1995-07-31 株式会社東芝 半導体装置の製造方法
JPH0783021B2 (ja) * 1985-07-10 1995-09-06 松下電子工業株式会社 半導体装置の製造方法
US4766006A (en) * 1986-05-15 1988-08-23 Varian Associates, Inc. Low pressure chemical vapor deposition of metal silicide
US4684542A (en) * 1986-08-11 1987-08-04 International Business Machines Corporation Low pressure chemical vapor deposition of tungsten silicide

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230019219A (ko) * 2017-05-15 2023-02-07 도쿄엘렉트론가부시키가이샤 첨단 패턴화 적용을 위한 원위치의 선택적 증착 및 에칭
KR20230110664A (ko) * 2017-05-15 2023-07-24 도쿄엘렉트론가부시키가이샤 첨단 패턴화 적용을 위한 원위치의 선택적 증착 및에칭

Also Published As

Publication number Publication date
US4902645A (en) 1990-02-20
EP0305143A2 (en) 1989-03-01
EP0305143A3 (en) 1990-10-03
EP0305143B1 (en) 1993-12-08
KR910009316B1 (ko) 1991-11-09

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