KR880701971A - 다중칩 집적회로 패키징 구성 및 방법 - Google Patents

다중칩 집적회로 패키징 구성 및 방법

Info

Publication number
KR880701971A
KR880701971A KR1019880700588A KR880700588A KR880701971A KR 880701971 A KR880701971 A KR 880701971A KR 1019880700588 A KR1019880700588 A KR 1019880700588A KR 880700588 A KR880700588 A KR 880700588A KR 880701971 A KR880701971 A KR 880701971A
Authority
KR
South Korea
Prior art keywords
integrated circuit
circuit packaging
packaging configuration
multichip integrated
multichip
Prior art date
Application number
KR1019880700588A
Other languages
English (en)
Other versions
KR960013632B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR880701971A publication Critical patent/KR880701971A/ko
Application granted granted Critical
Publication of KR960013632B1 publication Critical patent/KR960013632B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2401—Structure
    • H01L2224/2402—Laminated, e.g. MCM-L type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75314—Auxiliary members on the pressing surface
    • H01L2224/75315—Elastomer inlay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01032—Germanium [Ge]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
KR1019880700588A 1986-09-26 1987-09-14 다중칩 집적회로 패키징 구성 및 방법 KR960013632B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US06/912,456 US4783695A (en) 1986-09-26 1986-09-26 Multichip integrated circuit packaging configuration and method
PCT/US1987/002294 WO1988002552A1 (en) 1986-09-26 1987-09-14 Multichip integrated circuit packaging configuration and method
US912,456 1992-07-13

Publications (2)

Publication Number Publication Date
KR880701971A true KR880701971A (ko) 1988-11-07
KR960013632B1 KR960013632B1 (ko) 1996-10-10

Family

ID=25431956

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880700588A KR960013632B1 (ko) 1986-09-26 1987-09-14 다중칩 집적회로 패키징 구성 및 방법

Country Status (6)

Country Link
US (1) US4783695A (ko)
EP (1) EP0284624B1 (ko)
JP (1) JP2790455B2 (ko)
KR (1) KR960013632B1 (ko)
DE (1) DE3786914T2 (ko)
WO (1) WO1988002552A1 (ko)

Families Citing this family (278)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4884122A (en) * 1988-08-05 1989-11-28 General Electric Company Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer
US4937203A (en) * 1986-09-26 1990-06-26 General Electric Company Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer
US4890156A (en) * 1987-03-13 1989-12-26 Motorola Inc. Multichip IC module having coplanar dice and substrate
US5191224A (en) * 1987-04-22 1993-03-02 Hitachi, Ltd. Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein
JP2544396B2 (ja) * 1987-08-25 1996-10-16 株式会社日立製作所 半導体集積回路装置の製造方法
JP2610487B2 (ja) * 1988-06-10 1997-05-14 株式会社日立製作所 セラミック積層回路基板
US5019946A (en) * 1988-09-27 1991-05-28 General Electric Company High density interconnect with high volumetric efficiency
US5107586A (en) * 1988-09-27 1992-04-28 General Electric Company Method for interconnecting a stack of integrated circuits at a very high density
US4878991A (en) * 1988-12-12 1989-11-07 General Electric Company Simplified method for repair of high density interconnect circuits
US4988412A (en) * 1988-12-27 1991-01-29 General Electric Company Selective electrolytic desposition on conductive and non-conductive substrates
AU5094890A (en) * 1989-01-25 1990-09-05 Polylithics, Inc. Extended integration semiconductor structure and method of making the same
US5192716A (en) * 1989-01-25 1993-03-09 Polylithics, Inc. Method of making a extended integration semiconductor structure
US5055907A (en) * 1989-01-25 1991-10-08 Mosaic, Inc. Extended integration semiconductor structure with wiring layers
JPH0362547A (ja) * 1989-02-03 1991-03-18 General Electric Co <Ge> 集積回路試験構造物及び試験方法
US5225023A (en) * 1989-02-21 1993-07-06 General Electric Company High density interconnect thermoplastic die attach material and solvent die attach processing
US4933743A (en) * 1989-03-11 1990-06-12 Fairchild Semiconductor Corporation High performance interconnect system for an integrated circuit
US5151776A (en) * 1989-03-28 1992-09-29 General Electric Company Die attachment method for use in high density interconnected assemblies
US5019535A (en) * 1989-03-28 1991-05-28 General Electric Company Die attachment method using nonconductive adhesive for use in high density interconnected assemblies
US5144407A (en) * 1989-07-03 1992-09-01 General Electric Company Semiconductor chip protection layer and protected chip
US5258647A (en) * 1989-07-03 1993-11-02 General Electric Company Electronic systems disposed in a high force environment
US5209390A (en) * 1989-07-03 1993-05-11 General Electric Company Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid
US5150196A (en) * 1989-07-17 1992-09-22 Hughes Aircraft Company Hermetic sealing of wafer scale integrated wafer
US5032896A (en) * 1989-08-31 1991-07-16 Hughes Aircraft Company 3-D integrated circuit assembly employing discrete chips
DE3931238A1 (de) * 1989-09-19 1991-03-28 Siemens Ag Vielfach-chip-modul und verfahren zu dessen herstellung
US5108825A (en) * 1989-12-21 1992-04-28 General Electric Company Epoxy/polyimide copolymer blend dielectric and layered circuits incorporating it
JP3280394B2 (ja) * 1990-04-05 2002-05-13 ロックヒード マーティン コーポレーション 電子装置
DE4115043A1 (de) * 1991-05-08 1997-07-17 Gen Electric Dichtgepackte Verbindungsstruktur, die eine Kammer enthält
US5200810A (en) * 1990-04-05 1993-04-06 General Electric Company High density interconnect structure with top mounted components
US5351001A (en) * 1990-04-05 1994-09-27 General Electric Company Microwave component test method and apparatus
US5410179A (en) * 1990-04-05 1995-04-25 Martin Marietta Corporation Microwave component having tailored operating characteristics and method of tailoring
US5146303A (en) * 1990-04-05 1992-09-08 General Electric Company Compact, thermally efficient focal plane array and testing and repair thereof
US5206712A (en) * 1990-04-05 1993-04-27 General Electric Company Building block approach to microwave modules
US5157255A (en) * 1990-04-05 1992-10-20 General Electric Company Compact, thermally efficient focal plane array and testing and repair thereof
US5161093A (en) * 1990-07-02 1992-11-03 General Electric Company Multiple lamination high density interconnect process and structure employing a variable crosslinking adhesive
US5049978A (en) * 1990-09-10 1991-09-17 General Electric Company Conductively enclosed hybrid integrated circuit assembly using a silicon substrate
US5679977A (en) * 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US7198969B1 (en) 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5386623A (en) * 1990-11-15 1995-02-07 Hitachi, Ltd. Process for manufacturing a multi-chip module
US5138436A (en) * 1990-11-16 1992-08-11 Ball Corporation Interconnect package having means for waveguide transmission of rf signals
JP2960560B2 (ja) * 1991-02-28 1999-10-06 株式会社日立製作所 超小型電子機器
DE4108154A1 (de) * 1991-03-14 1992-09-17 Telefunken Electronic Gmbh Elektronische baugruppe und verfahren zur herstellung von elektronischen baugruppen
FR2674682A1 (fr) * 1991-03-26 1992-10-02 Thomson Csf Module hybride et procede de realisation.
US5111278A (en) * 1991-03-27 1992-05-05 Eichelberger Charles W Three-dimensional multichip module systems
US5250843A (en) * 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
US5144747A (en) * 1991-03-27 1992-09-08 Integrated System Assemblies Corporation Apparatus and method for positioning an integrated circuit chip within a multichip module
US5091769A (en) * 1991-03-27 1992-02-25 Eichelberger Charles W Configuration for testing and burn-in of integrated circuit chips
US5166605A (en) * 1991-08-02 1992-11-24 General Electric Company Controlled impedance test fixture for planar electronic device
US5239448A (en) * 1991-10-28 1993-08-24 International Business Machines Corporation Formulation of multichip modules
DE4135654A1 (de) * 1991-10-29 2003-03-27 Lockheed Corp Dichtgepackte Verbindungsstruktur, die eine Abstandshalterstruktur und einen Zwischenraum enthält
KR940005712B1 (ko) * 1991-11-14 1994-06-23 금성일랙트론 주식회사 잭 타입 아이씨 패키지(jack-type ic package)
US5291066A (en) * 1991-11-14 1994-03-01 General Electric Company Moisture-proof electrical circuit high density interconnect module and method for making same
US5257178A (en) * 1991-12-19 1993-10-26 General Electric Company Method of optimally operating a computer numerical control milling machine to mill optimal high density interconnect substrates
US5208729A (en) * 1992-02-14 1993-05-04 International Business Machines Corporation Multi-chip module
US5455459A (en) * 1992-03-27 1995-10-03 Martin Marietta Corporation Reconstructable interconnect structure for electronic circuits
JP2801810B2 (ja) * 1992-04-14 1998-09-21 株式会社東芝 樹脂封止型半導体装置
US5255431A (en) * 1992-06-26 1993-10-26 General Electric Company Method of using frozen epoxy for placing pin-mounted components in a circuit module
DE69326318T2 (de) * 1992-07-17 2000-02-03 Vlt Corp Verpackung für elektronische komponenten
US5336928A (en) * 1992-09-18 1994-08-09 General Electric Company Hermetically sealed packaged electronic system
US5544038A (en) * 1992-09-21 1996-08-06 General Electric Company Synchronous rectifier package for high-efficiency operation
US5279706A (en) * 1992-10-13 1994-01-18 General Electric Company Method and apparatus for fabricating a metal interconnection pattern for an integrated circuit module
US5285571A (en) * 1992-10-13 1994-02-15 General Electric Company Method for extending an electrical conductor over an edge of an HDI substrate
US5324687A (en) * 1992-10-16 1994-06-28 General Electric Company Method for thinning of integrated circuit chips for lightweight packaged electronic systems
US5366906A (en) * 1992-10-16 1994-11-22 Martin Marietta Corporation Wafer level integration and testing
US5422513A (en) * 1992-10-16 1995-06-06 Martin Marietta Corporation Integrated circuit chip placement in a high density interconnect structure
US6274391B1 (en) * 1992-10-26 2001-08-14 Texas Instruments Incorporated HDI land grid array packaged device having electrical and optical interconnects
JPH06151685A (ja) * 1992-11-04 1994-05-31 Mitsubishi Electric Corp Ｍｃｐ半導体装置
US5300812A (en) * 1992-12-09 1994-04-05 General Electric Company Plasticized polyetherimide adhesive composition and usage
US5374792A (en) * 1993-01-04 1994-12-20 General Electric Company Micromechanical moving structures including multiple contact switching system
US5384691A (en) * 1993-01-08 1995-01-24 General Electric Company High density interconnect multi-chip modules including embedded distributed power supply elements
US5352629A (en) * 1993-01-19 1994-10-04 General Electric Company Process for self-alignment and planarization of semiconductor chips attached by solder die adhesive to multi-chip modules
US5463201A (en) * 1993-02-04 1995-10-31 Generla Electric Company Seam-tracking apparatus for a welding system employing an array of eddy current elements
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5302547A (en) * 1993-02-08 1994-04-12 General Electric Company Systems for patterning dielectrics by laser ablation
US5418457A (en) * 1993-03-12 1995-05-23 General Electric Company System and method for aligning an inspection probe and maintaining uniform spacing between the probe surface and an inspection surface
US5401687A (en) * 1993-04-15 1995-03-28 Martin Marietta Corporation Process for high density interconnection of substrates and integrated circuit chips containing sensitive structures
US5381445A (en) * 1993-05-03 1995-01-10 General Electric Company Munitions cartridge transmitter
US5717332A (en) * 1993-05-03 1998-02-10 General Electric Company System and method using eddy currents to acquire positional data relating to fibers in a composite
US5353195A (en) * 1993-07-09 1994-10-04 General Electric Company Integral power and ground structure for multi-chip modules
US5654588A (en) * 1993-07-23 1997-08-05 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where the wafer uses a segmented conductive top-layer bus structure
US5399505A (en) * 1993-07-23 1995-03-21 Motorola, Inc. Method and apparatus for performing wafer level testing of integrated circuit dice
US5594273A (en) * 1993-07-23 1997-01-14 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where test pads lie within integrated circuit die but overly no active circuitry for improved yield
US5508558A (en) * 1993-10-28 1996-04-16 Digital Equipment Corporation High density, high speed, semiconductor interconnect using-multilayer flexible substrate with unsupported central portion
US5492586A (en) 1993-10-29 1996-02-20 Martin Marietta Corporation Method for fabricating encased molded multi-chip module substrate
US5432675A (en) * 1993-11-15 1995-07-11 Fujitsu Limited Multi-chip module having thermal contacts
KR0154994B1 (ko) * 1993-11-22 1998-12-01 세끼자와 다다시 반도체장치 및 그 제조방법
US5373627A (en) * 1993-11-23 1994-12-20 Grebe; Kurt R. Method of forming multi-chip module with high density interconnections
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
US5434751A (en) * 1994-04-11 1995-07-18 Martin Marietta Corporation Reworkable high density interconnect structure incorporating a release layer
US5449427A (en) * 1994-05-23 1995-09-12 General Electric Company Processing low dielectric constant materials for high speed electronics
EP0688047A1 (en) 1994-06-13 1995-12-20 Mitsubishi Materials Corporation Aluminium nitride substrate and method of producing the same
US5594629A (en) * 1994-06-20 1997-01-14 General Electric Company High-frequency switching circuits operable in a natural zero-voltage switching mode
US5891761A (en) * 1994-06-23 1999-04-06 Cubic Memory, Inc. Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US5675180A (en) 1994-06-23 1997-10-07 Cubic Memory, Inc. Vertical interconnect process for silicon segments
US5657206A (en) * 1994-06-23 1997-08-12 Cubic Memory, Inc. Conductive epoxy flip-chip package and method
US6080596A (en) * 1994-06-23 2000-06-27 Cubic Memory Inc. Method for forming vertical interconnect process for silicon segments with dielectric isolation
US6255726B1 (en) 1994-06-23 2001-07-03 Cubic Memory, Inc. Vertical interconnect process for silicon segments with dielectric isolation
US6124633A (en) * 1994-06-23 2000-09-26 Cubic Memory Vertical interconnect process for silicon segments with thermally conductive epoxy preform
US6486528B1 (en) 1994-06-23 2002-11-26 Vertical Circuits, Inc. Silicon segment programming apparatus and three terminal fuse configuration
US5798286A (en) * 1995-09-22 1998-08-25 Tessera, Inc. Connecting multiple microelectronic elements with lead deformation
US5546654A (en) * 1994-08-29 1996-08-20 General Electric Company Vacuum fixture and method for fabricating electronic assemblies
US6577148B1 (en) 1994-08-31 2003-06-10 Motorola, Inc. Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer
US5548099A (en) * 1994-09-13 1996-08-20 Martin Marietta Corporation Method for making an electronics module having air bridge protection without large area ablation
US5524339A (en) * 1994-09-19 1996-06-11 Martin Marietta Corporation Method for protecting gallium arsenide mmic air bridge structures
US6320257B1 (en) * 1994-09-27 2001-11-20 Foster-Miller, Inc. Chip packaging technique
US5527741A (en) 1994-10-11 1996-06-18 Martin Marietta Corporation Fabrication and structures of circuit modules with flexible interconnect layers
US5906310A (en) * 1994-11-10 1999-05-25 Vlt Corporation Packaging electrical circuits
US5644103A (en) * 1994-11-10 1997-07-01 Vlt Corporation Packaging electrical components having a scallop formed in an edge of a circuit board
US5876859A (en) * 1994-11-10 1999-03-02 Vlt Corporation Direct metal bonding
US5945130A (en) 1994-11-15 1999-08-31 Vlt Corporation Apparatus for circuit encapsulation
US5728600A (en) * 1994-11-15 1998-03-17 Vlt Corporation Circuit encapsulation process
US5675310A (en) * 1994-12-05 1997-10-07 General Electric Company Thin film resistors on organic surfaces
US5683928A (en) * 1994-12-05 1997-11-04 General Electric Company Method for fabricating a thin film resistor
US5561085A (en) 1994-12-19 1996-10-01 Martin Marietta Corporation Structure for protecting air bridges on semiconductor chips from damage
JP2732823B2 (ja) * 1995-02-02 1998-03-30 ヴィエルティー コーポレーション はんだ付け方法
JPH08288424A (ja) * 1995-04-18 1996-11-01 Nec Corp 半導体装置
US5657537A (en) * 1995-05-30 1997-08-19 General Electric Company Method for fabricating a stack of two dimensional circuit modules
US5844810A (en) * 1995-05-30 1998-12-01 General Electric Company Scaled adaptive lithography
US5552633A (en) * 1995-06-06 1996-09-03 Martin Marietta Corporation Three-dimensional multimodule HDI arrays with heat spreading
US5559363A (en) * 1995-06-06 1996-09-24 Martin Marietta Corporation Off-chip impedance matching utilizing a dielectric element and high density interconnect technology
WO1997001437A1 (en) * 1995-06-28 1997-01-16 Fraivillig Materials Company Circuit board laminates and method of making
US5770884A (en) * 1995-06-30 1998-06-23 International Business Machines Corporation Very dense integrated circuit package
US5745984A (en) * 1995-07-10 1998-05-05 Martin Marietta Corporation Method for making an electronic module
US6031726A (en) * 1995-11-06 2000-02-29 Vlt Corporation Low profile mounting of power converters with the converter body in an aperture
US5866952A (en) * 1995-11-30 1999-02-02 Lockheed Martin Corporation High density interconnected circuit module with a compliant layer as part of a stress-reducing molded substrate
US5672546A (en) * 1995-12-04 1997-09-30 General Electric Company Semiconductor interconnect method and structure for high temperature applications
US5567657A (en) * 1995-12-04 1996-10-22 General Electric Company Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers
US5736448A (en) 1995-12-04 1998-04-07 General Electric Company Fabrication method for thin film capacitors
US6137125A (en) * 1995-12-21 2000-10-24 The Whitaker Corporation Two layer hermetic-like coating for on-wafer encapsulatuon of GaAs MMIC's having flip-chip bonding capabilities
US5914508A (en) * 1995-12-21 1999-06-22 The Whitaker Corporation Two layer hermetic-like coating process for on-wafer encapsulation of GaAs MMIC's
US5888837A (en) * 1996-04-16 1999-03-30 General Electric Company Chip burn-in and test structure and method
US5972145A (en) * 1996-06-07 1999-10-26 International Business Machines Corporation Removable passivating polyimide coating and methods of use
US5731223A (en) * 1996-09-24 1998-03-24 Lsi Logic Corporation Array of solder pads on an integrated circuit
US5874770A (en) * 1996-10-10 1999-02-23 General Electric Company Flexible interconnect film including resistor and capacitor layers
US6093971A (en) * 1996-10-14 2000-07-25 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Chip module with conductor paths on the chip bonding side of a chip carrier
US5766979A (en) * 1996-11-08 1998-06-16 W. L. Gore & Associates, Inc. Wafer level contact sheet and method of assembly
US5857858A (en) * 1996-12-23 1999-01-12 General Electric Company Demountable and repairable low pitch interconnect for stacked multichip modules
US5904496A (en) * 1997-01-24 1999-05-18 Chipscale, Inc. Wafer fabrication of inside-wrapped contacts for electronic devices
JPH10223624A (ja) * 1997-02-06 1998-08-21 Nec Yamagata Ltd 半導体装置の製造方法
US6229203B1 (en) 1997-03-12 2001-05-08 General Electric Company Semiconductor interconnect structure for high temperature applications
US5814885A (en) * 1997-04-28 1998-09-29 International Business Machines Corporation Very dense integrated circuit package
US6040226A (en) * 1997-05-27 2000-03-21 General Electric Company Method for fabricating a thin film inductor
US6150719A (en) * 1997-07-28 2000-11-21 General Electric Company Amorphous hydrogenated carbon hermetic structure and fabrication method
US5886401A (en) * 1997-09-02 1999-03-23 General Electric Company Structure and fabrication method for interconnecting light emitting diodes with metallization extending through vias in a polymer film overlying the light emitting diodes
US5888884A (en) * 1998-01-02 1999-03-30 General Electric Company Electronic device pad relocation, precision placement, and packaging in arrays
US5998868A (en) * 1998-02-04 1999-12-07 International Business Machines Corporation Very dense chip package
US6087199A (en) * 1998-02-04 2000-07-11 International Business Machines Corporation Method for fabricating a very dense chip package
GB2334143A (en) * 1998-02-07 1999-08-11 Motorola Inc An electronic device package
US5959357A (en) * 1998-02-17 1999-09-28 General Electric Company Fet array for operation at different power levels
US6107179A (en) * 1998-05-28 2000-08-22 Xerox Corporation Integrated flexible interconnection
JP2000012607A (ja) * 1998-05-28 2000-01-14 Xerox Corp 集積回路装置、及びフリップチップボンディングされたコンビネ―ションを作成する方法
US6025638A (en) * 1998-06-01 2000-02-15 International Business Machines Corporation Structure for precision multichip assembly
JP3907845B2 (ja) * 1998-08-18 2007-04-18 沖電気工業株式会社 半導体装置
US6239980B1 (en) 1998-08-31 2001-05-29 General Electric Company Multimodule interconnect structure and process
US6251219B1 (en) 1998-09-17 2001-06-26 Intermedics Inc. Method and apparatus for use in assembling electronic devices
US6505665B1 (en) 1998-09-17 2003-01-14 Intermedics, Inc. Method and apparatus for use in assembling electronic devices
US6066513A (en) * 1998-10-02 2000-05-23 International Business Machines Corporation Process for precise multichip integration and product thereof
US6188301B1 (en) * 1998-11-13 2001-02-13 General Electric Company Switching structure and method of fabrication
US6234842B1 (en) 1998-11-20 2001-05-22 Vlt Corporation Power converter connector assembly
SG82591A1 (en) * 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with solder via
JP3635219B2 (ja) * 1999-03-11 2005-04-06 新光電気工業株式会社 半導体装置用多層基板及びその製造方法
US6468638B2 (en) * 1999-03-16 2002-10-22 Alien Technology Corporation Web process interconnect in electronic assemblies
US6110806A (en) * 1999-03-26 2000-08-29 International Business Machines Corporation Process for precision alignment of chips for mounting on a substrate
US6272271B1 (en) 1999-04-29 2001-08-07 General Electric Company Alignment of optical interfaces for data communication
US6333553B1 (en) 1999-05-21 2001-12-25 International Business Machines Corporation Wafer thickness compensation for interchip planarity
US6316737B1 (en) 1999-09-09 2001-11-13 Vlt Corporation Making a connection between a component and a circuit board
JP2003510824A (ja) * 1999-09-28 2003-03-18 ジエテツク，インコーポレーテツド 大きい深さ対幅アスペクト比をもつホールから、ポリマーを制御下にかつ急速に除去するための大気内プロセスおよびシステム
US6242282B1 (en) 1999-10-04 2001-06-05 General Electric Company Circuit chip package and fabrication method
US6955991B2 (en) * 1999-11-01 2005-10-18 Jetek, Inc. Atmospheric process and system for controlled and rapid removal of polymers from high depth to width aspect ratio holes
US6762136B1 (en) 1999-11-01 2004-07-13 Jetek, Inc. Method for rapid thermal processing of substrates
US7365019B2 (en) * 1999-11-01 2008-04-29 Jetek, Llc Atmospheric process and system for controlled and rapid removal of polymers from high aspect ratio holes
US6475877B1 (en) 1999-12-22 2002-11-05 General Electric Company Method for aligning die to interconnect metal on flex substrate
US6586682B2 (en) 2000-02-23 2003-07-01 Kulicke & Soffa Holdings, Inc. Printed wiring board with controlled line impedance
EP1990831A3 (en) * 2000-02-25 2010-09-29 Ibiden Co., Ltd. Multilayer printed circuit board and multilayer printed circuit board manufacturing method
US6410356B1 (en) 2000-03-07 2002-06-25 General Electric Company Silicon carbide large area device fabrication apparatus and method
EP1138804A3 (de) 2000-03-27 2003-06-25 Infineon Technologies AG Bauelement mit zumindest zwei aneinander grenzenden Isolierschichten und Herstellungsverfahren dazu
US6614103B1 (en) * 2000-09-01 2003-09-02 General Electric Company Plastic packaging of LED arrays
US7855342B2 (en) * 2000-09-25 2010-12-21 Ibiden Co., Ltd. Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
US6444560B1 (en) * 2000-09-26 2002-09-03 International Business Machines Corporation Process for making fine pitch connections between devices and structure made by the process
JP3923716B2 (ja) * 2000-09-29 2007-06-06 株式会社東芝 半導体装置
US6998281B2 (en) * 2000-10-12 2006-02-14 General Electric Company Solid state lighting device with reduced form factor including LED with directional emission and package with microoptics
US6434005B1 (en) 2000-10-27 2002-08-13 Vlt Corporation Power converter packaging
US6518600B1 (en) 2000-11-17 2003-02-11 General Electric Company Dual encapsulation for an LED
US6985341B2 (en) 2001-04-24 2006-01-10 Vlt, Inc. Components having actively controlled circuit elements
US7443229B1 (en) 2001-04-24 2008-10-28 Picor Corporation Active filtering
US6606247B2 (en) 2001-05-31 2003-08-12 Alien Technology Corporation Multi-feature-size electronic structures
US6696910B2 (en) * 2001-07-12 2004-02-24 Custom One Design, Inc. Planar inductors and method of manufacturing thereof
US6838750B2 (en) * 2001-07-12 2005-01-04 Custom One Design, Inc. Interconnect circuitry, multichip module, and methods of manufacturing thereof
US6706624B1 (en) 2001-10-31 2004-03-16 Lockheed Martin Corporation Method for making multichip module substrates by encapsulating electrical conductors
US6602739B1 (en) 2001-10-31 2003-08-05 Lockheed Martin Corporation Method for making multichip module substrates by encapsulating electrical conductors and filling gaps
US6908561B1 (en) 2001-11-06 2005-06-21 Lockhead Martin Corporation Polymide-to-substrate adhesion promotion in HDI
US6541378B1 (en) 2001-11-06 2003-04-01 Lockheed Martin Corporation Low-temperature HDI fabrication
US6753746B2 (en) * 2001-11-07 2004-06-22 Compeq Manufacturing Co., Ltd. Printed circuit board having jumper lines and the method for making said printed circuit board
US7214569B2 (en) 2002-01-23 2007-05-08 Alien Technology Corporation Apparatus incorporating small-feature-size and large-feature-size components and method for making same
FI119215B (fi) 2002-01-31 2008-08-29 Imbera Electronics Oy Menetelmä komponentin upottamiseksi alustaan ja elektroniikkamoduuli
JP2003243604A (ja) * 2002-02-13 2003-08-29 Sony Corp 電子部品及び電子部品の製造方法
US7579681B2 (en) * 2002-06-11 2009-08-25 Micron Technology, Inc. Super high density module with integrated wafer level packages
US7485489B2 (en) * 2002-06-19 2009-02-03 Bjoersell Sten Electronics circuit manufacture
AU2003253227A1 (en) * 2002-06-19 2004-01-06 Sten Bjorsell Electronics circuit manufacture
US6964881B2 (en) * 2002-08-27 2005-11-15 Micron Technology, Inc. Multi-chip wafer level system packages and methods of forming same
US6794222B1 (en) 2002-09-23 2004-09-21 Lockheed Martin Corporation HDI module with integral conductive electromagnetic shield
DE10250538B4 (de) * 2002-10-29 2008-02-21 Infineon Technologies Ag Elektronisches Bauteil als Multichipmodul und Verfahren zu dessen Herstellung
US6711312B1 (en) * 2002-12-20 2004-03-23 General Electric Company Integrated optoelectronic circuit and method of fabricating the same
US7327022B2 (en) * 2002-12-30 2008-02-05 General Electric Company Assembly, contact and coupling interconnection for optoelectronics
US7122404B2 (en) * 2003-03-11 2006-10-17 Micron Technology, Inc. Techniques for packaging a multiple device component
US6879038B2 (en) * 2003-03-12 2005-04-12 Optical Communication Products, Inc. Method and apparatus for hermetic sealing of assembled die
US7253735B2 (en) 2003-03-24 2007-08-07 Alien Technology Corporation RFID tags and processes for producing RFID tags
DE10314172B4 (de) * 2003-03-28 2006-11-30 Infineon Technologies Ag Verfahren zum Betreiben einer Anordnung aus einem elektrischen Bauelement auf einem Substrat und Verfahren zum Herstellen der Anordnung
US20040195669A1 (en) * 2003-04-07 2004-10-07 Wilkins Wendy Lee Integrated circuit packaging apparatus and method
US6921975B2 (en) * 2003-04-18 2005-07-26 Freescale Semiconductor, Inc. Circuit device with at least partial packaging, exposed active surface and a voltage reference plane
US6838776B2 (en) * 2003-04-18 2005-01-04 Freescale Semiconductor, Inc. Circuit device with at least partial packaging and method for forming
US6864165B1 (en) * 2003-09-15 2005-03-08 International Business Machines Corporation Method of fabricating integrated electronic chip with an interconnect device
US7338836B2 (en) * 2003-11-05 2008-03-04 California Institute Of Technology Method for integrating pre-fabricated chip structures into functional electronic systems
DE10355925B4 (de) * 2003-11-29 2006-07-06 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul und Verfahren seiner Herstellung
US7067352B1 (en) 2004-03-08 2006-06-27 David Ralph Scheid Vertical integrated package apparatus and method
DE102004018468A1 (de) * 2004-04-16 2006-02-16 eupec Europäische Gesellschaft für Leistungshalbleiter mbH Verfahren zum strukturierten Aufbringen einer laminierbaren Folie auf ein Substrat für ein Halbleitermodul
EP1743024B1 (en) * 2004-04-23 2011-09-28 Héma-Québec Method of expanding cord blood cells
DE102004025684A1 (de) 2004-04-29 2005-11-17 Osram Opto Semiconductors Gmbh Optoelektronischer Halbleiterchip und Verfahren zum Ausbilden einer Kontaktstruktur zur elektrischen Kontaktierung eines optoelektronischen Halbleiterchips
US20050242425A1 (en) * 2004-04-30 2005-11-03 Leal George R Semiconductor device with a protected active die region and method therefor
US7289336B2 (en) * 2004-10-28 2007-10-30 General Electric Company Electronic packaging and method of making the same
US7688206B2 (en) 2004-11-22 2010-03-30 Alien Technology Corporation Radio frequency identification (RFID) tag for an item having a conductive layer included or attached
FI20041525A (fi) * 2004-11-26 2006-03-17 Imbera Electronics Oy Elektroniikkamoduuli ja menetelmä sen valmistamiseksi
US7781741B2 (en) * 2005-10-27 2010-08-24 General Electric Company Methods and systems for controlling data acquisition system noise
DE102006009723A1 (de) * 2006-03-02 2007-09-06 Siemens Ag Verfahren zum Herstellen und planaren Kontaktieren einer elektronischen Vorrichtung und entsprechend hergestellte Vorrichtung
US8829661B2 (en) * 2006-03-10 2014-09-09 Freescale Semiconductor, Inc. Warp compensated package and method
US20070212813A1 (en) * 2006-03-10 2007-09-13 Fay Owen R Perforated embedded plane package and method
US8049338B2 (en) 2006-04-07 2011-11-01 General Electric Company Power semiconductor module and fabrication method
US7524775B2 (en) * 2006-07-13 2009-04-28 Infineon Technologies Ag Method for producing a dielectric layer for an electronic component
SG139594A1 (en) 2006-08-04 2008-02-29 Micron Technology Inc Microelectronic devices and methods for manufacturing microelectronic devices
US20080190748A1 (en) * 2007-02-13 2008-08-14 Stephen Daley Arthur Power overlay structure for mems devices and method for making power overlay structure for mems devices
TW200836315A (en) * 2007-02-16 2008-09-01 Richtek Techohnology Corp Electronic package structure and method thereof
US20080313894A1 (en) * 2007-06-21 2008-12-25 General Electric Company Method for making an interconnect structure and low-temperature interconnect component recovery process
US20080318413A1 (en) * 2007-06-21 2008-12-25 General Electric Company Method for making an interconnect structure and interconnect component recovery process
US20080318055A1 (en) * 2007-06-21 2008-12-25 General Electric Company Recoverable electronic component
US9610758B2 (en) * 2007-06-21 2017-04-04 General Electric Company Method of making demountable interconnect structure
US20080318054A1 (en) * 2007-06-21 2008-12-25 General Electric Company Low-temperature recoverable electronic component
US9953910B2 (en) * 2007-06-21 2018-04-24 General Electric Company Demountable interconnect structure
US7619901B2 (en) * 2007-06-25 2009-11-17 Epic Technologies, Inc. Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system
US20090028491A1 (en) * 2007-07-26 2009-01-29 General Electric Company Interconnect structure
US7605466B2 (en) * 2007-10-15 2009-10-20 General Electric Company Sealed wafer packaging of microelectromechanical systems
TWI360207B (en) 2007-10-22 2012-03-11 Advanced Semiconductor Eng Chip package structure and method of manufacturing
US7915696B2 (en) * 2007-10-24 2011-03-29 General Electric Company Electrical connection through a substrate to a microelectromechanical device
US7950144B2 (en) * 2008-04-30 2011-05-31 Freescale Semiconductor, Inc. Method for controlling warpage in redistributed chip packaging panels
FI123205B (fi) 2008-05-12 2012-12-31 Imbera Electronics Oy Piirimoduuli ja menetelmä piirimoduulin valmistamiseksi
US8253241B2 (en) * 2008-05-20 2012-08-28 Infineon Technologies Ag Electronic module
US8354304B2 (en) * 2008-12-05 2013-01-15 Stats Chippac, Ltd. Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant
US9299661B2 (en) * 2009-03-24 2016-03-29 General Electric Company Integrated circuit package and method of making same
US8026608B2 (en) * 2009-03-24 2011-09-27 General Electric Company Stackable electronic package
US20110156261A1 (en) * 2009-03-24 2011-06-30 Christopher James Kapusta Integrated circuit package and method of making same
US8163596B2 (en) 2009-03-24 2012-04-24 General Electric Company Stackable electronic package and method of making same
TWI456715B (zh) 2009-06-19 2014-10-11 Advanced Semiconductor Eng 晶片封裝結構及其製造方法
TWI466259B (zh) * 2009-07-21 2014-12-21 Advanced Semiconductor Eng 半導體封裝件、其製造方法及重佈晶片封膠體的製造方法
TWI405306B (zh) 2009-07-23 2013-08-11 Advanced Semiconductor Eng 半導體封裝件、其製造方法及重佈晶片封膠體
US20110084372A1 (en) 2009-10-14 2011-04-14 Advanced Semiconductor Engineering, Inc. Package carrier, semiconductor package, and process for fabricating same
US8378466B2 (en) 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
US8169065B2 (en) * 2009-12-22 2012-05-01 Epic Technologies, Inc. Stackable circuit structures and methods of fabrication thereof
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
US8372689B2 (en) 2010-01-21 2013-02-12 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with three-dimensional fan-out and manufacturing methods thereof
US8320134B2 (en) 2010-02-05 2012-11-27 Advanced Semiconductor Engineering, Inc. Embedded component substrate and manufacturing methods thereof
US20110198762A1 (en) * 2010-02-16 2011-08-18 Deca Technologies Inc. Panelized packaging with transferred dielectric
US10276486B2 (en) * 2010-03-02 2019-04-30 General Electric Company Stress resistant micro-via structure for flexible circuits
TWI411075B (zh) 2010-03-22 2013-10-01 Advanced Semiconductor Eng 半導體封裝件及其製造方法
US8624374B2 (en) 2010-04-02 2014-01-07 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof
US8278746B2 (en) 2010-04-02 2012-10-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages including connecting elements
US8349727B2 (en) 2010-04-08 2013-01-08 Liang Guo Integrated method for high-density interconnection of electronic components through stretchable interconnects
US8941222B2 (en) 2010-11-11 2015-01-27 Advanced Semiconductor Engineering Inc. Wafer level semiconductor package and manufacturing methods thereof
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
US20120161319A1 (en) * 2010-12-23 2012-06-28 Stmicroelectronics Pte Ltd. Ball grid array method and structure
WO2013044459A1 (en) * 2011-09-28 2013-04-04 Gemalto Technologies Asia Ltd Method of manufacturing a data carrier provided with a microcircuit
US9245819B2 (en) * 2012-02-22 2016-01-26 Freescale Semiconductor, Inc. Embedded electrical component surface interconnect
US9078352B2 (en) * 2012-10-29 2015-07-07 Avago Technologies General Ip (Singapore) Pte. Ltd. Low inductance flex bond with low thermal resistance
US9544499B2 (en) * 2013-11-17 2017-01-10 Energy Re-Connect Ltd. System apparatus and device for facilitating network edge device backup and methods of operation thereof
US9419156B2 (en) * 2013-08-30 2016-08-16 Taiwan Semiconductor Manufacturing Co., Ltd. Package and method for integration of heterogeneous integrated circuits
US9305901B2 (en) 2014-07-17 2016-04-05 Seagate Technology Llc Non-circular die package interconnect
KR102497583B1 (ko) * 2015-10-27 2023-02-10 삼성전자주식회사 유연한 연결부를 갖는 반도체 장치 및 그 제조방법
US10678150B1 (en) 2018-11-15 2020-06-09 Applied Materials, Inc. Dynamic generation of layout adaptive packaging
US11934762B2 (en) 2021-08-06 2024-03-19 Applied Materials, Inc. Overlaying on locally dispositioned patterns by ML based dynamic digital corrections (ML-DDC)

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3290756A (en) * 1962-08-15 1966-12-13 Hughes Aircraft Co Method of assembling and interconnecting electrical components
US3501832A (en) * 1966-02-26 1970-03-24 Sony Corp Method of making electrical wiring and wiring connections for electrical components
US3544857A (en) * 1966-08-16 1970-12-01 Signetics Corp Integrated circuit assembly with lead structure and method
US3702025A (en) * 1969-05-12 1972-11-07 Honeywell Inc Discretionary interconnection process
US3679941A (en) * 1969-09-22 1972-07-25 Gen Electric Composite integrated circuits including semiconductor chips mounted on a common substrate with connections made through a dielectric encapsulator
US3691628A (en) * 1969-10-31 1972-09-19 Gen Electric Method of fabricating composite integrated circuits
US4300153A (en) * 1977-09-22 1981-11-10 Sharp Kabushiki Kaisha Flat shaped semiconductor encapsulation
US4209356A (en) * 1978-10-18 1980-06-24 General Electric Company Selective etching of polymeric materials embodying silicones via reactor plasmas
EP0019391B1 (en) * 1979-05-12 1982-10-06 Fujitsu Limited Improvement in method of manufacturing electronic device having multilayer wiring structure
US4479088A (en) * 1981-01-16 1984-10-23 Burroughs Corporation Wafer including test lead connected to ground for testing networks thereon
US4426773A (en) * 1981-05-15 1984-01-24 General Electric Ceramics, Inc. Array of electronic packaging substrates
JPS592537A (ja) * 1982-06-29 1984-01-09 富士通電装株式会社 バスシステム
US4414059A (en) * 1982-12-09 1983-11-08 International Business Machines Corporation Far UV patterning of resist materials
US4613891A (en) * 1984-02-17 1986-09-23 At&T Bell Laboratories Packaging microminiature devices
US4677528A (en) * 1984-05-31 1987-06-30 Motorola, Inc. Flexible printed circuit board having integrated circuit die or the like affixed thereto
JPS61111561A (ja) * 1984-10-05 1986-05-29 Fujitsu Ltd 半導体装置
US4588468A (en) * 1985-03-28 1986-05-13 Avco Corporation Apparatus for changing and repairing printed circuit boards
US4617085A (en) * 1985-09-03 1986-10-14 General Electric Company Process for removing organic material in a patterned manner from an organic film
EP0228694A3 (en) * 1985-12-30 1989-10-04 E.I. Du Pont De Nemours And Company Process using combination of laser etching and another etchant in formation of conductive through-holes in a dielectric layer

Also Published As

Publication number Publication date
KR960013632B1 (ko) 1996-10-10
EP0284624A1 (en) 1988-10-05
DE3786914D1 (de) 1993-09-09
WO1988002552A1 (en) 1988-04-07
JP2790455B2 (ja) 1998-08-27
DE3786914T2 (de) 1994-03-24
US4783695A (en) 1988-11-08
JPH01500944A (ja) 1989-03-30
EP0284624B1 (en) 1993-08-04

Similar Documents

Publication Publication Date Title
KR880701971A (ko) 다중칩 집적회로 패키징 구성 및 방법
KR880702041A (ko) 회로 패키지 접착 장치 및 방법
KR870011686A (ko) 반도체장치 및 그 제조방법
KR880701972A (ko) 고속 주문 설계 및 테스트용 집적회로 패키징 구성
KR860006137A (ko) 반도체 집적회로
KR870009477A (ko) 반도체장치와 그 제조방법
GB2198584B (en) Semiconductor device and method of making the same
GB8703879D0 (en) Semiconductor laser device
GB8609337D0 (en) Semiconductor devices
EP0248646A3 (en) Semiconductor laser device
EP0273725A3 (en) Encapsulated semiconductor device
KR890004398A (ko) 반도체장치 및 그의 제조방법
KR870008394A (ko) 반도체장치 및 그 제조방법
GB2188778B (en) Semiconductor ic devices
GB8612010D0 (en) Semiconductor devices
GB2188479B (en) Semiconductor devices
GB8718709D0 (en) Semiconductor laser device
KR880701968A (ko) 반도체장치 및 그 제조방법
GB8702970D0 (en) Semiconductor laser device
KR880701017A (ko) 반도체 장치
GB8729129D0 (en) Semiconductor laser device
KR860006136A (ko) 반도체 집적 회로 장치
GB2195825B (en) Integrated circuit package
KR860007757A (ko) 반도체 집적회로장치
KR890700245A (ko) 회로장치

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20081007

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee