KR880014641A - Ic카드 및 그 제조방법 - Google Patents

Ic카드 및 그 제조방법 Download PDF

Info

Publication number
KR880014641A
KR880014641A KR870004878A KR870004878A KR880014641A KR 880014641 A KR880014641 A KR 880014641A KR 870004878 A KR870004878 A KR 870004878A KR 870004878 A KR870004878 A KR 870004878A KR 880014641 A KR880014641 A KR 880014641A
Authority
KR
South Korea
Prior art keywords
core sheet
conductive
card
chip
semiconductor
Prior art date
Application number
KR870004878A
Other languages
English (en)
Other versions
KR900003803B1 (ko
Inventor
마사유키 오우치
히로시 오다이라
겐이치 요시다
Original Assignee
와타리 스기이치로
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 와타리 스기이치로, 가부시키가이샤 도시바 filed Critical 와타리 스기이치로
Publication of KR880014641A publication Critical patent/KR880014641A/ko
Application granted granted Critical
Publication of KR900003803B1 publication Critical patent/KR900003803B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01032Germanium [Ge]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01042Molybdenum [Mo]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01051Antimony [Sb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01052Tellurium [Te]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01076Osmium [Os]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01077Iridium [Ir]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.

Abstract

내용 없음

Description

IC카드 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 구현예인 IC카드의 주요부분을 나타낸 단면도, 제2a도∼제2e도는 본 발명에 따른 IC카드를 제조하는 공정을 단계적으로 나타낸 단면도이다.

Claims (11)

  1. 절연성 코어시이트(1)와 이 코어시이트(1)내에 매설되며 전극(4)을 구비하고 있는 반도체 IC칩(3) 및 상기 전극(4)과 접속되도록 코어시이트(1)상에 증착되는 도전층패턴(6)을 구비하고 있는 IC카드에 있어서, 상기한 반도체 IC칩(3)에는 전극(4)위에 형성되는 도전성 돌기물(5)이 설치되고, 상기한 도전성 돌기물(5)의 노출표면이 도전층패턴(3)을 증착시키게 되는 코어시이트(1)의 주표면과 같은 높이로 됨과 더불어 상기 도전층패턴(6)이 상기 노출표면에서 도전성 돌기물(5)과 접속되는 형태로 반도체 IC칩(3)이 코어시이트(1)의 내부에 매설되는 것을 특징으로 하는 IC카드.
  2. 반도체IC칩(3)의 두께보다 더 두꺼우며 열가소성 수지로 이루어진 코어시이트(1)를 준비해서 그 코어시이트(1)를 관통하는 최소한 한 개 이상의 관통구멍(2)을 뚫는 단계와, 상기 반도체칩(3)상에 증착되는 전극(4)의 위에다가 도전성 돌기물(5)을 형성시키는 단계, 상기 코어시이트(1) 주표면의 측면쪽에 위치하게 되는 도전성 돌기물(5)이 형성되어 있는 상기 반도체 IC칩(3)을 관통구멍(2)내에 끼우는 단계, 상기 코어시이트(1)의 주표면과 도전성 돌기물(5)의 머릿부분이 같은 높이로 되도록 반도체 IC칩(3)을 내장하고 있는 코어시이트(1)의 주표면과 도전성 돌기물(5)의 머릿부분이 같은 높이로 되도록 반도체 IC칩(3)을 내장하고 있는 코어시이트(1)의 주표면과 그 반대면 사이에 가열가압처리를 실시해서 코어시이트(1)를 소성변형시키는 단계 및, 코어시이트(1)의 주표면상에 도전층패턴(6)을 증착시켜서 상기 도전성 돌기물(5)의 노출표면과 접촉시키는 단계로 이루어져 있는 IC카드의 제조방법.
  3. 제2항에 있어서, 도전성 돌기물(5)은 IC칩(3)의 구성재료 보다도 경도가 낮은 재질로 이루어진 것을 특징으로 하는 IC카드의 제조방법.
  4. 제3항에 있어서 도전성 돌기물(5)은 Au,Cu,Ag,Al,Zn,Pd,Sn,Os,Pt,Ir로부터 선택한 최소한 한가지 이상의 금속으로 만들어진 것을 특징으로 하는 IC카드의 제조방법.
  5. 제3항에 있어서, 도전성 돌기물(5)은 Pd,Sn,In,Ag,Ga,Au,Bi,Te,Ge,Sb로부터 선택한 최소한 2종류이상의 금속을 포함하는 합금으로 이루어진 것을 특징으로 하는 IC카드의 제조방법.
  6. 제3항에 있어서, 도전성 돌기물(5)은 금속과 수지의 복합재료로 만들어진 것을 특징으로 하는 IC카드의 제조방법.
  7. 제2항에 있어서, 도전성 돌기물(5)은 볼 본딩이나, 전기도금법, 진공증착법, 스퍼터링법,이온도금법, 레이저성장법, 전사법, 디핑법, 디스펜싱법중 어떠한 방법에 의해 형성되는 것을 특징으로 하는 IC카드의 제조방법.
  8. 제2항에 있어서, 도전성 돌기물(5)은 반도체 IC칩(3)의 표면으로부터 도전성 돌기물(5)의 머릿부분까지의 거리가 열가소성 코어시이트(1)의 두께에서 반도체 IC칩(3)의 두께를 뺀 칫수와 같거나 그 이상이 되게끔 형성되는 것을 특징으로 하는 IC카드의 제조방법.
  9. 제2항에 있어서, 열가소성 코어시이트(1)는 폴리카보네이트수지나 염화비닐수지, 염화비닐-초산비닐공중합체수지, 폴리슬폰수지, 폴리에틸렌테레프탈레이트수지, 폴리에텔케톤수지, 폴리메틸펜텔수지, 폴리알리레이트수지, 폴리에텔슬폰수지, 폴리에델이미드수지, 폴리페닐설파이드수지, ABS수지중에서 선택한 수지로 만들어지는 것을 특징으로 하는 IC카드의 제조방법.
  10. 제2항에 있어서, 도전층패턴(6)은 수지에다 Au,Ag,Cu,Pt,Ni,Sn,W,Mo,Pd,SiC,RuO2등의 금속중에서 선택한 금속분말이나 합금분말 혹은 금속산화물 분말을 혼합하여서 된 도전성 페이스트를 사용하는 인쇄법에 의해 형성되는 것을 특징으로 하는 IC카드의 제조방법.
  11. 제2항에 있어서, 도전층패턴(6)은 Au,Ag,Cu,Pt,Ni,Sn,W,Mo,Pd중의 한가지 금속을 진공증착법이나 스퍼터링법 또는 무전해 전기도금법으로 코어시이트(1)의 표면상에 형성시킨 후 포토리소그라피법에 따라 소정의 형태로 패터닝하여 만들어진 것을 특징으로 하는 IC카드의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019870004878A 1986-05-20 1987-05-18 Ic카드 및 그 제조방법 KR900003803B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP61115585A JPH074995B2 (ja) 1986-05-20 1986-05-20 Icカ−ド及びその製造方法
JP115585 1986-05-20
JP61-115585 1986-05-20

Publications (2)

Publication Number Publication Date
KR880014641A true KR880014641A (ko) 1988-12-24
KR900003803B1 KR900003803B1 (ko) 1990-05-31

Family

ID=14666233

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870004878A KR900003803B1 (ko) 1986-05-20 1987-05-18 Ic카드 및 그 제조방법

Country Status (5)

Country Link
US (2) US4931853A (ko)
EP (1) EP0246744B1 (ko)
JP (1) JPH074995B2 (ko)
KR (1) KR900003803B1 (ko)
DE (1) DE3782972T2 (ko)

Families Citing this family (78)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2625067A1 (fr) * 1987-12-22 1989-06-23 Sgs Thomson Microelectronics Procede pour fixer sur un support un composant electronique et ses contacts
ATE100616T1 (de) * 1988-06-21 1994-02-15 Gec Avery Ltd Herstellung von tragbaren elektronischen karten.
BE1002529A6 (nl) * 1988-09-27 1991-03-12 Bell Telephone Mfg Methode om een elektronische component te monteren en geheugen kaart waarin deze wordt toegepast.
USRE35578E (en) * 1988-12-12 1997-08-12 Sgs-Thomson Microelectronics, Inc. Method to install an electronic component and its electrical connections on a support, and product obtained thereby
US5182420A (en) * 1989-04-25 1993-01-26 Cray Research, Inc. Method of fabricating metallized chip carriers from wafer-shaped substrates
US5412247A (en) * 1989-07-28 1995-05-02 The Charles Stark Draper Laboratory, Inc. Protection and packaging system for semiconductor devices
US5155068A (en) * 1989-08-31 1992-10-13 Sharp Kabushiki Kaisha Method for manufacturing an IC module for an IC card whereby an IC device and surrounding encapsulant are thinned by material removal
US5081563A (en) * 1990-04-27 1992-01-14 International Business Machines Corporation Multi-layer package incorporating a recessed cavity for a semiconductor chip
US5227338A (en) * 1990-04-30 1993-07-13 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
JPH0429338A (ja) * 1990-05-24 1992-01-31 Nippon Mektron Ltd Icの搭載用回路基板及びその搭載方法
US5241456A (en) * 1990-07-02 1993-08-31 General Electric Company Compact high density interconnect structure
JP2560895B2 (ja) * 1990-07-25 1996-12-04 三菱電機株式会社 Icカードの製造方法およびicカード
US5196377A (en) * 1990-12-20 1993-03-23 Cray Research, Inc. Method of fabricating silicon-based carriers
FR2672427A1 (fr) * 1991-02-04 1992-08-07 Schiltz Andre Procede et dispositif d'insertion de puces dans des logements d'un substrat par film intermediaire.
JP2816028B2 (ja) * 1991-02-18 1998-10-27 株式会社東芝 半導体装置の製造方法
JPH06122297A (ja) * 1992-08-31 1994-05-06 Sony Chem Corp Icカード及びその製造方法
EP0591862B1 (en) * 1992-10-02 1999-05-26 Matsushita Electric Industrial Co., Ltd. A semiconductor device, an image sensor device, and methods for producing the same
KR0137398B1 (ko) * 1992-10-23 1998-04-29 모리시타 요이찌 완전밀착형 이미지센서 및 유닛 그리고 그 제조방법
ZA941671B (en) * 1993-03-11 1994-10-12 Csir Attaching an electronic circuit to a substrate.
US5422514A (en) * 1993-05-11 1995-06-06 Micromodule Systems, Inc. Packaging and interconnect system for integrated circuits
US5689136A (en) * 1993-08-04 1997-11-18 Hitachi, Ltd. Semiconductor device and fabrication method
JP3348528B2 (ja) * 1994-07-20 2002-11-20 富士通株式会社 半導体装置の製造方法と半導体装置及び電子回路装置の製造方法と電子回路装置
ATE167319T1 (de) * 1994-11-03 1998-06-15 Fela Holding Ag Basis folie für chip karte
US5952713A (en) * 1994-12-27 1999-09-14 Takahira; Kenichi Non-contact type IC card
FR2735284B1 (fr) * 1995-06-12 1997-08-29 Solaic Sa Puce pour carte electronique revetue d'une couche de matiere isolante et carte electronique comportant une telle puce
US5874780A (en) * 1995-07-27 1999-02-23 Nec Corporation Method of mounting a semiconductor device to a substrate and a mounted structure
DE19528730A1 (de) * 1995-08-04 1997-02-06 Giesecke & Devrient Gmbh Verfahren zur Herstellung eines Datenträgers
US5817207A (en) * 1995-10-17 1998-10-06 Leighton; Keith R. Radio frequency identification card and hot lamination process for the manufacture of radio frequency identification cards
US6036099A (en) 1995-10-17 2000-03-14 Leighton; Keith Hot lamination process for the manufacture of a combination contact/contactless smart card and product resulting therefrom
US6441736B1 (en) 1999-07-01 2002-08-27 Keith R. Leighton Ultra-thin flexible durable radio frequency identification devices and hot or cold lamination process for the manufacture of ultra-thin flexible durable radio frequency identification devices
US5674785A (en) * 1995-11-27 1997-10-07 Micron Technology, Inc. Method of producing a single piece package for semiconductor die
US6013948A (en) * 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
US6861290B1 (en) * 1995-12-19 2005-03-01 Micron Technology, Inc. Flip-chip adaptor package for bare die
US5811879A (en) * 1996-06-26 1998-09-22 Micron Technology, Inc. Stacked leads-over-chip multi-chip module
WO1998052772A1 (fr) * 1997-05-19 1998-11-26 Hitachi Maxell, Ltd. Module de circuit integre flexible et son procede de production, procede de production de support d'information comprenant ledit module
US5899705A (en) * 1997-11-20 1999-05-04 Akram; Salman Stacked leads-over chip multi-chip module
EP0942392A3 (en) * 1998-03-13 2000-10-18 Kabushiki Kaisha Toshiba Chip card
US6241153B1 (en) 1998-03-17 2001-06-05 Cardxx, Inc. Method for making tamper-preventing, contact-type, smart cards
USRE43112E1 (en) 1998-05-04 2012-01-17 Round Rock Research, Llc Stackable ball grid array package
US6040622A (en) * 1998-06-11 2000-03-21 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US6414391B1 (en) 1998-06-30 2002-07-02 Micron Technology, Inc. Module assembly for stacked BGA packages with a common bus bar in the assembly
TW368707B (en) * 1998-10-27 1999-09-01 Tech Field Co Ltd Packaging method for semiconductor die and the product of the same
FR2790849B1 (fr) * 1999-03-12 2001-04-27 Gemplus Card Int Procede de fabrication pour dispositif electronique du type carte sans contact
JP3517374B2 (ja) * 1999-05-21 2004-04-12 新光電気工業株式会社 非接触型icカードの製造方法
FR2794265B1 (fr) * 1999-05-25 2003-09-19 Gemplus Card Int Procede de fabrication de cartes a puce a contact avec dielectrique bas cout
FR2794266B1 (fr) 1999-05-25 2002-01-25 Gemplus Card Int Procede de fabrication de dispositif electronique portable a circuit integre comportant un dielectrique bas cout
WO2001005602A1 (fr) * 1999-07-21 2001-01-25 Ibiden Co., Ltd. Carte a circuit imprime et son procede de fabrication
JP3864029B2 (ja) * 2000-03-24 2006-12-27 松下電器産業株式会社 半導体パッケージ及び半導体パッケージの製造方法
DE10016715C1 (de) * 2000-04-04 2001-09-06 Infineon Technologies Ag Herstellungsverfahren für laminierte Chipkarten
JP4403631B2 (ja) * 2000-04-24 2010-01-27 ソニー株式会社 チップ状電子部品の製造方法、並びにその製造に用いる擬似ウエーハの製造方法
JP2001313350A (ja) * 2000-04-28 2001-11-09 Sony Corp チップ状電子部品及びその製造方法、並びにその製造に用いる疑似ウエーハ及びその製造方法
US20020175402A1 (en) * 2001-05-23 2002-11-28 Mccormack Mark Thomas Structure and method of embedding components in multi-layer substrates
US6545227B2 (en) 2001-07-11 2003-04-08 Mce/Kdi Corporation Pocket mounted chip having microstrip line
US6506632B1 (en) * 2002-02-15 2003-01-14 Unimicron Technology Corp. Method of forming IC package having downward-facing chip cavity
JP3678212B2 (ja) * 2002-05-20 2005-08-03 ウシオ電機株式会社 超高圧水銀ランプ
US6972964B2 (en) * 2002-06-27 2005-12-06 Via Technologies Inc. Module board having embedded chips and components and method of forming the same
TW546800B (en) * 2002-06-27 2003-08-11 Via Tech Inc Integrated moduled board embedded with IC chip and passive device and its manufacturing method
US6755700B2 (en) * 2002-11-12 2004-06-29 Modevation Enterprises Inc. Reset speed control for watercraft
US7312101B2 (en) * 2003-04-22 2007-12-25 Micron Technology, Inc. Packaged microelectronic devices and methods for packaging microelectronic devices
US7408258B2 (en) * 2003-08-20 2008-08-05 Salmon Technologies, Llc Interconnection circuit and electronic module utilizing same
US20050184376A1 (en) * 2004-02-19 2005-08-25 Salmon Peter C. System in package
US7427809B2 (en) * 2004-12-16 2008-09-23 Salmon Technologies, Llc Repairable three-dimensional semiconductor subsystem
US20070007983A1 (en) * 2005-01-06 2007-01-11 Salmon Peter C Semiconductor wafer tester
EP1864249B1 (en) * 2005-03-23 2014-12-24 Cardxx, Inc Method for making contactless smart cards with integrated electronics using isotropic thermoset adhesive materials with high quality exterior surfaces and smart cards produced by said method
JP4657840B2 (ja) * 2005-07-14 2011-03-23 新藤電子工業株式会社 半導体装置、およびその製造方法
US20070023904A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Electro-optic interconnection apparatus and method
US20070023923A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Flip chip interface including a mixed array of heat bumps and signal bumps
US7586747B2 (en) * 2005-08-01 2009-09-08 Salmon Technologies, Llc. Scalable subsystem architecture having integrated cooling channels
US20070023889A1 (en) * 2005-08-01 2007-02-01 Salmon Peter C Copper substrate with feedthroughs and interconnection circuits
JP5164362B2 (ja) * 2005-11-02 2013-03-21 キヤノン株式会社 半導体内臓基板およびその製造方法
TWI325745B (en) * 2006-11-13 2010-06-01 Unimicron Technology Corp Circuit board structure and fabrication method thereof
TW200836315A (en) * 2007-02-16 2008-09-01 Richtek Techohnology Corp Electronic package structure and method thereof
US7557489B2 (en) * 2007-07-10 2009-07-07 Siemens Medical Solutions Usa, Inc. Embedded circuits on an ultrasound transducer and method of manufacture
US7514290B1 (en) * 2008-04-24 2009-04-07 International Business Machines Corporation Chip-to-wafer integration technology for three-dimensional chip stacking
TW201136468A (en) * 2010-04-06 2011-10-16 Chung-Cheng Wang A printing circuit board and being used
JP6128495B2 (ja) * 2012-07-04 2017-05-17 パナソニックIpマネジメント株式会社 電子部品実装構造体、icカード、cofパッケージ
US9627338B2 (en) 2013-03-06 2017-04-18 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming ultra high density embedded semiconductor die package
US10181449B1 (en) * 2017-09-28 2019-01-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2102421C3 (de) * 1971-01-19 1979-09-06 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer strukturierten metallischen Schicht auf einem keramischen Grundkörper
JPS5230184A (en) * 1975-09-02 1977-03-07 Sharp Corp Semiconductor device
US4214904A (en) * 1978-12-12 1980-07-29 The United States Of America As Represented By The Secretary Of The Air Force Gold-tin-silicon alloy for brazing silicon to metal
JPS577142A (en) * 1980-06-16 1982-01-14 Toshiba Corp Marking method of resin-sealed semiconductor device
JPS577147A (en) * 1980-06-17 1982-01-14 Citizen Watch Co Ltd Mounting construction of semiconductor device
FR2489043A1 (fr) * 1980-08-20 1982-02-26 Thomson Csf Embase de boitier d'encapsulation et procede de report d'un composant sur cette embase
FR2492164B1 (fr) * 1980-10-15 1987-01-23 Radiotechnique Compelec Procede de realisation simultanee de liaisons electriques multiples, notamment pour le raccordement electrique d'une micro-plaquette de semiconducteurs
DE8122540U1 (de) * 1981-07-31 1983-01-13 Philips Patentverwaltung Gmbh, 2000 Hamburg "informationskarte mit integriertem baustein"
JPS58173790A (ja) * 1982-04-06 1983-10-12 シチズン時計株式会社 表示装置と半導体装置の接続構造
FR2527036A1 (fr) * 1982-05-14 1983-11-18 Radiotechnique Compelec Procede pour connecter un semiconducteur a des elements d'un support, notamment d'une carte portative
JPS6175488A (ja) * 1984-09-19 1986-04-17 Toshiba Corp Icカ−ドの製造方法

Also Published As

Publication number Publication date
EP0246744A2 (en) 1987-11-25
KR900003803B1 (ko) 1990-05-31
JPH074995B2 (ja) 1995-01-25
JPS62270393A (ja) 1987-11-24
US4931853A (en) 1990-06-05
EP0246744B1 (en) 1992-12-09
US4997791A (en) 1991-03-05
EP0246744A3 (en) 1989-06-14
DE3782972T2 (de) 1993-04-29
DE3782972D1 (de) 1993-01-21

Similar Documents

Publication Publication Date Title
KR880014641A (ko) Ic카드 및 그 제조방법
US4687552A (en) Rhodium capped gold IC metallization
US5162144A (en) Process for metallizing substrates using starved-reaction metal-oxide reduction
EP0878834A3 (en) A method for preventing electroplanting of copper on an exposed surface at the edge exclusion of a semiconductor wafer
EP1744609A3 (en) Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board
DE1965546B2 (de) Halbleiterbauelement
EP0326077A3 (en) Circuit board
KR870008054A (ko) 질화 알루미늄 기판
EP0265629A3 (en) Printed circuit card fabrication process with nickel overplate
US20010001551A1 (en) Ceramic thermistor chips
JP2005199699A (ja) 電子機械的構成要素用の複合材を製造するための連続層、その複合材及び製造方法と使用方法
JPS574184A (en) Metallic thin strip for installing semiconductor light-emitting element
JPS5732621A (en) Fabrication of semiconductor device
JPS6037640B2 (ja) プリント基板
JPS57140884A (en) Plating method for silver
JPS57201072A (en) Semiconductor device and manufacture thereof
JPS5910252A (ja) フイルムキヤリアのフレキシブルテ−プ
JPS6417450A (en) Formation of bump
US20190174631A1 (en) Miniaturized circuit and method of making the same
FR2448837A1 (fr) Circuit imprime
JPS63161646A (ja) 半導体装置の製造方法
Souter et al. Electrical Contact Surface Coating
JPS56148836A (en) Forming method for back electrode of semiconductor wafer
Ratner et al. Interactions of Thin Al Films with Ni–Cr Alloy and Bilayer Films Deposited on Si
JPS5596668A (en) Method of fabricating ceramic substrate

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 19930510

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee