KR870007565A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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KR870007565A
KR870007565A KR1019860008590A KR860008590A KR870007565A KR 870007565 A KR870007565 A KR 870007565A KR 1019860008590 A KR1019860008590 A KR 1019860008590A KR 860008590 A KR860008590 A KR 860008590A KR 870007565 A KR870007565 A KR 870007565A
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metal
semiconductor device
conductive material
insulating film
electrode portion
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KR920005699B1 (ko
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하지메 아라이
이사오 후루다
헤데후미 구로기
쥰이찌 아리마
요시히로 히라다
시게루 하라다
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시기 모리야
미쓰비시 뎅기 가부시끼가이샤
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Abstract

내용 없음

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 일실시예에 의한 반도체 장치의 구조를 표시한 단면도
제 2 도는 본 발명의 별도 발명의 일실시예에 의한 반도체장치의 제조방법의 일 공정을 표시한 단면도
* 도면의 주요부분에 대한 부호의 설명
1 : A1 전극부 2 : 패시베이션 막 3 : 배리어메탈층
4 : 드라이필름 5 : 도전성 수지재료 6 : 웨이퍼
10 : 오목부

Claims (18)

  1. 웨이퍼상에 형성되며 기판과의 전기적 접촉을 얻기위한 전극부와 상기 전극부를 제외한 상기 웨이퍼상에 형성된 패시베이션막과 상기 패이션막상에만 소정 두께로 형성된 절연막과 상기 절연막에 의하여 상기 전극부상에 형성된 오목부에 적어도 상기 절연막의 표면 높이까지 충진하여 형성된 도전성 물질을 보유하는 것을 특징으로 하는 반도체장치.
  2. 제 1 항에 있어서 상기 전극부와 상기 도전성 물질과의 사이에 크롬, 동, 닉켈, 티탄, 은, 금 또는 이들의 합금으로 된 막이 일층 또는 다층으로 형성되어서 된 배리어메탈층이 형성되어 있음을 특징으로 한 반도체장치.
  3. 제 1 항 또는 제 2 항에 있어서 상기 전극부는 알루미늄, 고융점 또는 고융점금속의 실리사이드일것을 특징으로 하는 반도체장치.
  4. 제 1 항 또는 제 2 항에 있어서 상기 절연막은 드라이 필름일 것을 특징으로 하는 반도체장치.
  5. 제 3 항에 있어서 상기 절연막은 드라이 필름일 것을 특징으로 하는 반도체장치.
  6. 제 1 항 또는 제 2 항에 있어서 상기 도전성 물질은 금속, 금속화합물 또는 도전성 고분자일것을 특징으로 하는 반도체장치.
  7. 제 3 항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성고분자일 것을 특징으로 하는 반도체장치.
  8. 제 4 항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성고분자일 것을 특징으로 하는 반도체 장치.
  9. 제 5 항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성 고분자일 것을 특징으로 하는 반도체장치.
  10. 웨이퍼상에 기판과의 전기적 접촉을 얻기 위한 전극부를 형성하는 제 1 공정과 상기 전극부상을 제외한 상기 웨이퍼상에 패시베이션막을 형성하는 제 2 의 공정과 그후 웨이퍼상 전면에 소정의 두께의 절연막을 형성하는 제 3 의 공정과 상기 절연막의 상기 전극부상의 부분을 사진제판에 의하여 제거하는 제 4 공정과 상기 절연막상에 상기 전극부상의 오목부를 충진하여 균일한 높이까지 도전성물질을 도포 형성하는 제 5 의 공정과 상기 도전성물질의 전면을 균일하게 에칭하여 상기 절연막상의 상기 도전성물질을 제거하는 제 6 의 공정과를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
  11. 제10항에 있어서 상기 제 2 와 제 3 의 공정사이에 상기 전극부 상층에 크롬, 동, 닉켈, 티탄, 은, 금 또는 이들의 합금으로 된 막이 일층 또는 다층으로 형성되어서 되는 배리어메탈층을 형성하는 공정을 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
  12. 제10항 또는 제11항에 있어서 상기 전극부는 알루미늄, 고융점금속 또는 고융점금속의 실리사이드일 것을 특징으로 하는 반도체장치의 제조방법.
  13. 제10항 또는 제11항에 있어서 상기 절연막은 드라이 필름일 것을 특징으로 하는 반도체장치의 제조방법.
  14. 제12항에 있어서 상기 절연막은 드라이 필림일 것을 특징으로 하는 반도체장치의 제조방법.
  15. 제10항 또는 제11항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성고분자일 것을 특징으로 하는 반도체장치의 제조방법.
  16. 제12항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성고분자일 것을 특징으로 하는 반도체 장치의 제조방법.
  17. 제13항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성 고분자인 것을 특징으로 하는 반도체 장치의 제조방법.
  18. 제14항에 있어서 상기 도전성물질은 금속, 금속화합물 또는 도전성 고분자일 것을 특징으로 하는 반도체 장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860008590A 1986-01-27 1986-10-14 반도체 장치 KR920005699B1 (ko)

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JP61016162A JPH0815152B2 (ja) 1986-01-27 1986-01-27 半導体装置及びその製造方法
JP16162 1986-01-27
JP62-016162 1986-01-27

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KR920005699B1 KR920005699B1 (ko) 1992-07-13

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US4961259A (en) * 1989-06-16 1990-10-09 Hughes Aircraft Company Method of forming an interconnection by an excimer laser
US5093710A (en) * 1989-07-07 1992-03-03 Seiko Epson Corporation Semiconductor device having a layer of titanium nitride on the side walls of contact holes and method of fabricating same
US5074947A (en) * 1989-12-18 1991-12-24 Epoxy Technology, Inc. Flip chip technology using electrically conductive polymers and dielectrics
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JPH0815152B2 (ja) 1996-02-14
US4922321A (en) 1990-05-01
KR920005699B1 (ko) 1992-07-13
JPS62173740A (ja) 1987-07-30
DE3702354A1 (de) 1987-07-30

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