KR20060044663A - 초박 칩의 제조 프로세스 및 제조장치 - Google Patents

초박 칩의 제조 프로세스 및 제조장치 Download PDF

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Publication number
KR20060044663A
KR20060044663A KR1020050024385A KR20050024385A KR20060044663A KR 20060044663 A KR20060044663 A KR 20060044663A KR 1020050024385 A KR1020050024385 A KR 1020050024385A KR 20050024385 A KR20050024385 A KR 20050024385A KR 20060044663 A KR20060044663 A KR 20060044663A
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KR
South Korea
Prior art keywords
wafer
dicing
tape
surface protection
semiconductor wafer
Prior art date
Application number
KR1020050024385A
Other languages
English (en)
Korean (ko)
Inventor
킨야 모치다
미키오 코미야마
켄이찌 와타나베
Original Assignee
린텍 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 린텍 가부시키가이샤 filed Critical 린텍 가부시키가이샤
Publication of KR20060044663A publication Critical patent/KR20060044663A/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)
KR1020050024385A 2004-03-24 2005-03-24 초박 칩의 제조 프로세스 및 제조장치 KR20060044663A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004086330A JP2005276987A (ja) 2004-03-24 2004-03-24 極薄チップの製造プロセス及び製造装置
JPJP-P-2004-00086330 2004-03-24

Publications (1)

Publication Number Publication Date
KR20060044663A true KR20060044663A (ko) 2006-05-16

Family

ID=35062409

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020050024385A KR20060044663A (ko) 2004-03-24 2005-03-24 초박 칩의 제조 프로세스 및 제조장치

Country Status (4)

Country Link
JP (1) JP2005276987A (de)
KR (1) KR20060044663A (de)
DE (1) DE102005013545A1 (de)
TW (1) TW200601443A (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214417A (ja) * 2006-02-10 2007-08-23 Disco Abrasive Syst Ltd ウエーハの分割方法
JP5032152B2 (ja) * 2007-02-27 2012-09-26 リンテック株式会社 接着剤除去装置及び接着剤除去方法
JP5137435B2 (ja) * 2007-03-28 2013-02-06 古河電気工業株式会社 半導体ウェハのチップ化処理方法
JP2014229702A (ja) * 2013-05-21 2014-12-08 株式会社ディスコ レーザー加工装置
DE112018007519T5 (de) * 2018-04-24 2021-01-14 Disco Hi-Tec Europe Gmbh Vorrichtung und Verfahren zum Aufbringen eines Schutzbandes auf einem Halbleiterwafer
JP2019197869A (ja) * 2018-05-11 2019-11-14 株式会社ディスコ Daf貼着装置
CN112975148B (zh) * 2021-02-07 2022-12-13 苏州镭明激光科技有限公司 一种晶圆激光隐形切割设备和切割方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04356942A (ja) * 1991-03-28 1992-12-10 Toshiba Corp 半導体集積回路装置の製造方法
JPH10189496A (ja) * 1996-12-24 1998-07-21 Toshiba Corp ウェーハ切断方法およびその装置
JP2001057357A (ja) * 1999-08-19 2001-02-27 Tokyo Seimitsu Co Ltd エッチング装置
JP2004001076A (ja) * 2002-03-12 2004-01-08 Hamamatsu Photonics Kk レーザ加工方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62274742A (ja) * 1986-05-23 1987-11-28 Mitsubishi Electric Corp ウエハ用シ−ト貼り機
JPH08181197A (ja) * 1994-12-27 1996-07-12 Hitachi Ltd 半導体装置の製造方法およびそれに用いるウエハマウンタ
JP2002141309A (ja) * 2000-11-02 2002-05-17 Lintec Corp ダイシングシートおよびその使用方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04356942A (ja) * 1991-03-28 1992-12-10 Toshiba Corp 半導体集積回路装置の製造方法
JPH10189496A (ja) * 1996-12-24 1998-07-21 Toshiba Corp ウェーハ切断方法およびその装置
JP2001057357A (ja) * 1999-08-19 2001-02-27 Tokyo Seimitsu Co Ltd エッチング装置
JP2004001076A (ja) * 2002-03-12 2004-01-08 Hamamatsu Photonics Kk レーザ加工方法

Also Published As

Publication number Publication date
TW200601443A (en) 2006-01-01
DE102005013545A1 (de) 2005-10-27
JP2005276987A (ja) 2005-10-06

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Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application