TW200601443A - Manufacturing process and manufacturing device of ultra thin chip - Google Patents

Manufacturing process and manufacturing device of ultra thin chip

Info

Publication number
TW200601443A
TW200601443A TW094108976A TW94108976A TW200601443A TW 200601443 A TW200601443 A TW 200601443A TW 094108976 A TW094108976 A TW 094108976A TW 94108976 A TW94108976 A TW 94108976A TW 200601443 A TW200601443 A TW 200601443A
Authority
TW
Taiwan
Prior art keywords
wafer
ultra thin
tape
dicing
stage
Prior art date
Application number
TW094108976A
Other languages
Chinese (zh)
Inventor
Kinya Mochida
Mikio Komiyama
Kenichi Watanabe
Original Assignee
Lintec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lintec Corp filed Critical Lintec Corp
Publication of TW200601443A publication Critical patent/TW200601443A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)

Abstract

The subject of the present invention is to provide a manufacturing process of ultra thin chip attempting to simplify the processing and lower the cost of the production equipment and still processing in a way without damaging an ultra thin wafer. An ultra thin chip can be obtained by the following processes, which include a wafer aligning process that obtains and positions a wafer 2 whose circuit surface is attached with a surface protection tape; a wafer transporting process that moves the positioned wafer 2 and provides it onto a stage 10 by placing the side with circuit as the bottom side; a wafer dicing process that performs laser dicing on the reverse side of the wafer 2 containing circuit while the wafer 2 is sucked and kept on the stage 10; a wafer fixing process that attaches tape to the wafer 2 performed by laser dicing process and to a dicing frame 11 on the stage 10, treats the wafer 2 and the dicing frame 11 as work pieces W and integrally integrates both; a tape removing process that removes the protective tape attached on the circuit surface of the wafer 2; and a wafer receiving process that receives the wafer 2 without the surface protective tape.
TW094108976A 2004-03-24 2005-03-23 Manufacturing process and manufacturing device of ultra thin chip TW200601443A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004086330A JP2005276987A (en) 2004-03-24 2004-03-24 Ultra-thin chip manufacturing process and manufacturing apparatus therefor

Publications (1)

Publication Number Publication Date
TW200601443A true TW200601443A (en) 2006-01-01

Family

ID=35062409

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094108976A TW200601443A (en) 2004-03-24 2005-03-23 Manufacturing process and manufacturing device of ultra thin chip

Country Status (4)

Country Link
JP (1) JP2005276987A (en)
KR (1) KR20060044663A (en)
DE (1) DE102005013545A1 (en)
TW (1) TW200601443A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112005363A (en) * 2018-04-24 2020-11-27 迪思科高科技(欧洲)有限公司 Apparatus and method for attaching protective tape to semiconductor wafer

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214417A (en) * 2006-02-10 2007-08-23 Disco Abrasive Syst Ltd Wafer dividing method
JP5032152B2 (en) * 2007-02-27 2012-09-26 リンテック株式会社 Adhesive removing apparatus and adhesive removing method
JP5137435B2 (en) * 2007-03-28 2013-02-06 古河電気工業株式会社 Semiconductor wafer chip processing method
JP2014229702A (en) * 2013-05-21 2014-12-08 株式会社ディスコ Laser processing device
JP2019197869A (en) * 2018-05-11 2019-11-14 株式会社ディスコ Daf sticking equipment
CN112975148B (en) * 2021-02-07 2022-12-13 苏州镭明激光科技有限公司 Wafer laser invisible cutting equipment and cutting method

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62274742A (en) * 1986-05-23 1987-11-28 Mitsubishi Electric Corp Sheet-affixing machine for wafer
JP3165192B2 (en) * 1991-03-28 2001-05-14 株式会社東芝 Method for manufacturing semiconductor integrated circuit device
JPH08181197A (en) * 1994-12-27 1996-07-12 Hitachi Ltd Manufacture of semiconductor device and wafer mounter to be used for the same
JPH10189496A (en) * 1996-12-24 1998-07-21 Toshiba Corp Method and machine for cutting wafer
JP3348700B2 (en) * 1999-08-19 2002-11-20 株式会社東京精密 Etching equipment
JP2002141309A (en) * 2000-11-02 2002-05-17 Lintec Corp Dicing sheet and method of using the same
JP3624909B2 (en) * 2002-03-12 2005-03-02 浜松ホトニクス株式会社 Laser processing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112005363A (en) * 2018-04-24 2020-11-27 迪思科高科技(欧洲)有限公司 Apparatus and method for attaching protective tape to semiconductor wafer
CN112005363B (en) * 2018-04-24 2024-05-31 迪思科高科技(欧洲)有限公司 Apparatus and method for attaching protective tape to semiconductor wafer

Also Published As

Publication number Publication date
KR20060044663A (en) 2006-05-16
DE102005013545A1 (en) 2005-10-27
JP2005276987A (en) 2005-10-06

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