TW200601443A - Manufacturing process and manufacturing device of ultra thin chip - Google Patents

Manufacturing process and manufacturing device of ultra thin chip

Info

Publication number
TW200601443A
TW200601443A TW094108976A TW94108976A TW200601443A TW 200601443 A TW200601443 A TW 200601443A TW 094108976 A TW094108976 A TW 094108976A TW 94108976 A TW94108976 A TW 94108976A TW 200601443 A TW200601443 A TW 200601443A
Authority
TW
Taiwan
Prior art keywords
wafer
ultra thin
tape
dicing
stage
Prior art date
Application number
TW094108976A
Other languages
English (en)
Chinese (zh)
Inventor
Kinya Mochida
Mikio Komiyama
Kenichi Watanabe
Original Assignee
Lintec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lintec Corp filed Critical Lintec Corp
Publication of TW200601443A publication Critical patent/TW200601443A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)
TW094108976A 2004-03-24 2005-03-23 Manufacturing process and manufacturing device of ultra thin chip TW200601443A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004086330A JP2005276987A (ja) 2004-03-24 2004-03-24 極薄チップの製造プロセス及び製造装置

Publications (1)

Publication Number Publication Date
TW200601443A true TW200601443A (en) 2006-01-01

Family

ID=35062409

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094108976A TW200601443A (en) 2004-03-24 2005-03-23 Manufacturing process and manufacturing device of ultra thin chip

Country Status (4)

Country Link
JP (1) JP2005276987A (de)
KR (1) KR20060044663A (de)
DE (1) DE102005013545A1 (de)
TW (1) TW200601443A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112005363A (zh) * 2018-04-24 2020-11-27 迪思科高科技(欧洲)有限公司 用于将保护胶带贴附至半导体晶片的装置和方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214417A (ja) * 2006-02-10 2007-08-23 Disco Abrasive Syst Ltd ウエーハの分割方法
JP5032152B2 (ja) * 2007-02-27 2012-09-26 リンテック株式会社 接着剤除去装置及び接着剤除去方法
JP5137435B2 (ja) * 2007-03-28 2013-02-06 古河電気工業株式会社 半導体ウェハのチップ化処理方法
JP2014229702A (ja) * 2013-05-21 2014-12-08 株式会社ディスコ レーザー加工装置
JP2019197869A (ja) * 2018-05-11 2019-11-14 株式会社ディスコ Ｄａｆ貼着装置
CN112975148B (zh) * 2021-02-07 2022-12-13 苏州镭明激光科技有限公司 一种晶圆激光隐形切割设备和切割方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62274742A (ja) * 1986-05-23 1987-11-28 Mitsubishi Electric Corp ウエハ用シ−ト貼り機
JP3165192B2 (ja) * 1991-03-28 2001-05-14 株式会社東芝 半導体集積回路装置の製造方法
JPH08181197A (ja) * 1994-12-27 1996-07-12 Hitachi Ltd 半導体装置の製造方法およびそれに用いるウエハマウンタ
JPH10189496A (ja) * 1996-12-24 1998-07-21 Toshiba Corp ウェーハ切断方法およびその装置
JP3348700B2 (ja) * 1999-08-19 2002-11-20 株式会社東京精密 エッチング装置
JP2002141309A (ja) * 2000-11-02 2002-05-17 Lintec Corp ダイシングシートおよびその使用方法
JP3624909B2 (ja) * 2002-03-12 2005-03-02 浜松ホトニクス株式会社 レーザ加工方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112005363A (zh) * 2018-04-24 2020-11-27 迪思科高科技(欧洲)有限公司 用于将保护胶带贴附至半导体晶片的装置和方法
CN112005363B (zh) * 2018-04-24 2024-05-31 迪思科高科技(欧洲)有限公司 用于将保护胶带贴附至半导体晶片的装置和方法

Also Published As

Publication number Publication date
KR20060044663A (ko) 2006-05-16
DE102005013545A1 (de) 2005-10-27
JP2005276987A (ja) 2005-10-06

Similar Documents

Publication Publication Date Title
TW200601443A (en) Manufacturing process and manufacturing device of ultra thin chip
TW200706307A (en) Semiconductor wafer peripheral edge polisher and method therefor
WO2005044512A3 (en) Apparatus and method for grinding and/or polishing an edge of a glass sheet
WO2011123670A3 (en) Method and apparatus for improved wafer singulation
TWI346591B (en) Laser processing method and semiconductor chip
HK1144235A1 (en) Method for picking up semiconductor chips from a wafer table and mounting the removed semiconductor chips on a substrate
TW200729390A (en) Method for making semiconductor wafer
SG111946A1 (en) Die bonding sheet sticking apparatus and method of sticking die bonding sheet
WO2008114753A1 (ja) 基板載置台，基板処理装置，基板載置台の表面加工方法
TW200619872A (en) Composition and process for ashless removal of post-etch photoresist and/or bottom anti-reflective material on a substrate
SG130020A1 (en) Method of processing a semiconductor wafer
EP1580800A4 (de) Verfahren zum schneiden eines halbleitersubstrats
SG135040A1 (en) Method for processing wafer
TWI350554B (en) Method for manufacturing semiconductor device and substrate processing apparatus
EP1552043A4 (de) Vefahren zur herstellung von kristallinen halbleiterschichten auf fremdsubstraten
AU2003249592A8 (en) Method and apparatus for picking up semiconductor chip and suction and exfoliation tool up therefor
TW200715527A (en) Method for manufacturing semiconductor device
TW200511422A (en) Treatment or processing of substrate surfaces
TW200705281A (en) IC chip mounting method
WO2005091868A3 (en) Wafer scale die handling
EP1643545A4 (de) Verfahren zum verarbeiten eines silicium-wafers
TWI318781B (en) Apparatus and method for picking up semiconductor chip
TW200731380A (en) Semiconductor wafer manufacturing method, semiconductor wafer double-sided grinding method, and semiconductor wafer double-sided grinding apparatus
EP1630858A4 (de) Substratverarbeitungssystem und verfahren zur herstellung eines halbleiterbauelements
EP1693887A4 (de) Verarbeitungsverfahren für einen siliciumwafer