KR20040029292A - 접합 웨이퍼의 제조방법 - Google Patents
접합 웨이퍼의 제조방법 Download PDFInfo
- Publication number
- KR20040029292A KR20040029292A KR10-2003-7003660A KR20037003660A KR20040029292A KR 20040029292 A KR20040029292 A KR 20040029292A KR 20037003660 A KR20037003660 A KR 20037003660A KR 20040029292 A KR20040029292 A KR 20040029292A
- Authority
- KR
- South Korea
- Prior art keywords
- wafer
- heat treatment
- soi
- bonded
- thin film
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
Abstract
Description
실시예 1 | 실시예 2 | 비교예 1 | 비교예 2 | |
처리플로우 | 결합열처리를 행하지 않음↓Ar 아닐링↓희생산화↓산화막제거 | 결합열처리↓Ar 아닐링↓40nm 연마↓희생산화↓산화막제거 | 결합열처리를 행하지 않음↓Ar 아닐링 | 결합열처리↓희생산화↓산화막제거↓Ar 아닐링 |
실시예 3 | 실시예 4 | 비교예 3 | |
처리플로우 | 결합열처리↓Ar 아닐링↓55nm 연마↓희생산화↓산화막제거 | 결합열처리↓Ar 아닐링↓70nm 연마↓희생산화↓산화막제거 | 결합열처리↓100nm 연마 |
처리조건및측정조건 | (결합열처리)1100℃ 120분(N2100%분위기)(Ar 아닐링)1200℃ 60분 (Ar 100% 분위기)(희생산화)950℃ 파이로제닉산화,산화막두께: 590nm(실시예 1), 500nm(실시에 2),465nm(실시예 3), 435nm(실시예 4)590nm(비교예 2)(산화막 제거)5% 불산에 의한 에칭(표면거칠기 측정)Veeco 사제품 AFM, 1㎛각(角) 및 10㎛각(角)의 RMS측정(막두께분포 측정)ADE 사제품 AcuMap2, 면내 1765점측정(결함측정)SOI 층두께가 30nm로 되기 까지 희석세코 에칭→불산에칭 →광학현미경관찰 |
RMS(nm) | 막두께분포(nm) | 결함밀도(개/cm2) | |||
1㎛ 각(角) | 10㎛ 각(角) | 평균치 t | σ | ||
실시예 1 | 0.08 | 0.29 | 171.5 | 0.2 | 1×102 |
실시예 2 | 0.06 | 0.16 | 172.4 | 1.0 | 1×102 |
비교예 1 | 0.10 | 0.28 | 437.0 | 0.2 | 1×105 |
비교예 2 | 0.11 | 0.30 | 171.5 | 0.2 | 1×104 |
RMS(nm) | 막두께분포(nm) | 결함밀도(개/cm2) | |||
1㎛ 각(角) | 10㎛ 각(角) | 평균치 t | σ | ||
실시예 3 | 0.08 | 0.15 | 172.5 | 1.4 | 1×102 |
실시예 4 | 0.09 | 0.14 | 171.5 | 1.5 | 1×102 |
비교예 3 | 0.10 | 0.13 | 437.0 | 2.0 | 5×105 |
Claims (6)
- 적어도, 가스이온의 주입에 의해 형성된 미소기포층을 갖는 본드 웨이퍼와 지지기판으로 되는 베이스 웨이퍼를 접합하는 공정과, 상기 미소기포층을 경계로 하여 본드 웨이퍼를 박리하여 베이스 웨이퍼상에 박막을 형성하는 공정을 갖는 이온주입박리법에 의하여 접합웨이퍼를 제조하는 방법에 있어서, 상기 본드 웨이퍼를 박리한 후의 접합웨이퍼에 불활성 가스, 수소가스, 또는 이들의 혼합가스분위기하에서 열처리를 실시하고, 그 후, 이 접합웨이퍼에 열산화를 행하여 상기 박막의 표면에 열산화막을 형성하고, 이 열산화막을 제거하는 것에 의하여 상기 박막의 두께를 줄이는 것을 특징으로 하는 접합 웨이퍼의 제조방법
- 제1항에 있어서, 상기 불활성 가스, 수소가스, 또는 이들의 혼합가스분위기하에서의 열처리후, 상기 박막의 표면을 70nm 이하의 연마량으로 연마하고, 그 후 상기 열산화를 행하는 것을 특징으로 하는 접합 웨이퍼의 제조방법
- 제1항 또는 제2항에 있어서, 상기 불활성 가스, 수소가스, 또는 이들의 혼합가스분위기하에서의 열처리를, 아르곤 100% 분위기 또는 폭발한계이하의 수소를 포함하는 아르곤 분위기에서 행하는 것을 특징으로 하는 접합 웨이퍼의 제조방법
- 제1항 내지 제3항중의 어느 한 항에 있어서, 상기 본드 웨이퍼로서, 실리콘단결정 웨이퍼를 사용하는 것을 특징으로 하는 접합 웨이퍼의 제조방법
- 제1항 내지 제4항중의 어느 한 항에 기재된 방법에 의하여 제조된 접합 웨이퍼
- 2 매의 실리콘 웨이퍼를 산화막을 통하여 접합시켜 제조된 SOI 웨이퍼에 있어서, SOI층표면을 1㎛ 각(角) 및 10㎛ 각(角)으로 측정한 표면거칠기(RMS)가 어느 것이나 0.15nm 이하이고, SOI 층의 막두께의 σ가 1.5nm이하인 것을 특징으로 하는 접합 SOI 웨이퍼
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001216828 | 2001-07-17 | ||
JPJP-P-2001-00216828 | 2001-07-17 | ||
PCT/JP2002/006965 WO2003009386A1 (fr) | 2001-07-17 | 2002-07-09 | Procede de production de plaquettes de liaison |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20040029292A true KR20040029292A (ko) | 2004-04-06 |
KR100874724B1 KR100874724B1 (ko) | 2008-12-19 |
Family
ID=19051250
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020037003660A KR100874724B1 (ko) | 2001-07-17 | 2002-07-09 | 접합 웨이퍼의 제조방법 |
Country Status (7)
Country | Link |
---|---|
US (1) | US6884696B2 (ko) |
EP (1) | EP1408551B1 (ko) |
JP (1) | JP4526818B2 (ko) |
KR (1) | KR100874724B1 (ko) |
CN (1) | CN100454552C (ko) |
TW (1) | TWI270940B (ko) |
WO (1) | WO2003009386A1 (ko) |
Cited By (4)
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KR100898649B1 (ko) * | 2004-05-28 | 2009-05-22 | 가부시키가이샤 섬코 | Soi기판 및 그 제조방법 |
KR100972213B1 (ko) * | 2005-12-27 | 2010-07-26 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Soi 웨이퍼의 제조 방법 및 soi 웨이퍼 |
KR101335713B1 (ko) * | 2007-02-28 | 2013-12-04 | 신에쓰 가가꾸 고교 가부시끼가이샤 | 접합 기판의 제조방법 및 접합 기판 |
KR20180073580A (ko) * | 2015-10-28 | 2018-07-02 | 신에쯔 한도타이 가부시키가이샤 | 접합 soi 웨이퍼의 제조방법 |
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-
2002
- 2002-07-09 EP EP02743891.0A patent/EP1408551B1/en not_active Expired - Lifetime
- 2002-07-09 US US10/380,979 patent/US6884696B2/en not_active Expired - Lifetime
- 2002-07-09 KR KR1020037003660A patent/KR100874724B1/ko active IP Right Grant
- 2002-07-09 JP JP2003514627A patent/JP4526818B2/ja not_active Expired - Fee Related
- 2002-07-09 CN CNB028024648A patent/CN100454552C/zh not_active Expired - Lifetime
- 2002-07-09 WO PCT/JP2002/006965 patent/WO2003009386A1/ja active Application Filing
- 2002-07-15 TW TW091115723A patent/TWI270940B/zh not_active IP Right Cessation
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100898649B1 (ko) * | 2004-05-28 | 2009-05-22 | 가부시키가이샤 섬코 | Soi기판 및 그 제조방법 |
KR100972213B1 (ko) * | 2005-12-27 | 2010-07-26 | 신에쓰 가가꾸 고교 가부시끼가이샤 | Soi 웨이퍼의 제조 방법 및 soi 웨이퍼 |
KR101335713B1 (ko) * | 2007-02-28 | 2013-12-04 | 신에쓰 가가꾸 고교 가부시끼가이샤 | 접합 기판의 제조방법 및 접합 기판 |
US8765576B2 (en) | 2007-02-28 | 2014-07-01 | Shin-Etsu Chemical Co., Ltd. | Process for producing laminated substrate and laminated substrate |
KR20180073580A (ko) * | 2015-10-28 | 2018-07-02 | 신에쯔 한도타이 가부시키가이샤 | 접합 soi 웨이퍼의 제조방법 |
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EP1408551A1 (en) | 2004-04-14 |
JP4526818B2 (ja) | 2010-08-18 |
EP1408551A4 (en) | 2009-06-17 |
TWI270940B (en) | 2007-01-11 |
CN1465104A (zh) | 2003-12-31 |
WO2003009386A1 (fr) | 2003-01-30 |
US6884696B2 (en) | 2005-04-26 |
EP1408551B1 (en) | 2014-07-02 |
JPWO2003009386A1 (ja) | 2004-11-11 |
CN100454552C (zh) | 2009-01-21 |
US20030181001A1 (en) | 2003-09-25 |
KR100874724B1 (ko) | 2008-12-19 |
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