KR102526306B1 - 반도체 제조 방법 및 플라즈마 처리 장치 - Google Patents
반도체 제조 방법 및 플라즈마 처리 장치 Download PDFInfo
- Publication number
- KR102526306B1 KR102526306B1 KR1020180021733A KR20180021733A KR102526306B1 KR 102526306 B1 KR102526306 B1 KR 102526306B1 KR 1020180021733 A KR1020180021733 A KR 1020180021733A KR 20180021733 A KR20180021733 A KR 20180021733A KR 102526306 B1 KR102526306 B1 KR 102526306B1
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- KR
- South Korea
- Prior art keywords
- film
- gas
- chamber
- vapor pressure
- organic film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
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- H01L21/3065—
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- H01L21/02274—
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- H01L21/324—
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- H01L21/67069—
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- H01L21/67098—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0402—Apparatus for fluid treatment
- H10P72/0418—Apparatus for fluid treatment for etching
- H10P72/0421—Apparatus for fluid treatment for etching for drying etching
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0431—Apparatus for thermal treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/90—Thermal treatments, e.g. annealing or sintering
Landscapes
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017036891 | 2017-02-28 | ||
| JPJP-P-2017-036891 | 2017-02-28 | ||
| JP2017201978A JP6742287B2 (ja) | 2017-02-28 | 2017-10-18 | 半導体製造方法及びプラズマ処理装置 |
| JPJP-P-2017-201978 | 2017-10-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20180099504A KR20180099504A (ko) | 2018-09-05 |
| KR102526306B1 true KR102526306B1 (ko) | 2023-04-26 |
Family
ID=63526829
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020180021733A Active KR102526306B1 (ko) | 2017-02-28 | 2018-02-23 | 반도체 제조 방법 및 플라즈마 처리 장치 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP6742287B2 (https=) |
| KR (1) | KR102526306B1 (https=) |
| TW (1) | TWI761455B (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7410065B2 (ja) | 2020-03-19 | 2024-01-09 | 信越化学工業株式会社 | 生体電極、生体電極の製造方法及び生体信号の測定方法 |
| JP7096279B2 (ja) | 2020-03-25 | 2022-07-05 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置、プログラム、および基板処理方法 |
| JP7507136B2 (ja) | 2020-11-05 | 2024-06-27 | 信越化学工業株式会社 | 生体電極組成物、生体電極、及び生体電極の製造方法 |
| JP7627671B2 (ja) | 2021-04-16 | 2025-02-06 | 信越化学工業株式会社 | 生体電極組成物、生体電極、及び生体電極の製造方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100215460A1 (en) * | 2007-11-09 | 2010-08-26 | Canon Anelva Corporation | Inline-type wafer conveyance device |
| JP2011151057A (ja) | 2010-01-19 | 2011-08-04 | Fujitsu Semiconductor Ltd | 半導体装置の製造方法 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002270586A (ja) * | 2001-03-08 | 2002-09-20 | Tokyo Electron Ltd | 有機系絶縁膜のエッチング方法およびデュアルダマシンプロセス |
| KR20050055074A (ko) * | 2003-10-07 | 2005-06-13 | 삼성전자주식회사 | 기상 불산 식각 과정을 이용한 얕은 트렌치 소자 분리형성 방법 |
| JP5047504B2 (ja) * | 2005-02-05 | 2012-10-10 | 三星電子株式会社 | ビアキャッピング保護膜を使用する半導体素子のデュアルダマシン配線の製造方法 |
| US7803719B2 (en) * | 2006-02-24 | 2010-09-28 | Freescale Semiconductor, Inc. | Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device |
| JP2010114255A (ja) * | 2008-11-06 | 2010-05-20 | Toshiba Corp | 半導体装置の製造方法 |
| JP2011134771A (ja) * | 2009-12-22 | 2011-07-07 | Fujitsu Semiconductor Ltd | 半導体装置及びその製造方法 |
| JP5490753B2 (ja) * | 2010-07-29 | 2014-05-14 | 東京エレクトロン株式会社 | トレンチの埋め込み方法および成膜システム |
| JP5937632B2 (ja) | 2014-02-06 | 2016-06-22 | 東京エレクトロン株式会社 | 基板処理方法、前処理装置、後処理装置、基板処理システムおよび記憶媒体 |
| JP6140576B2 (ja) | 2013-08-27 | 2017-05-31 | 東京エレクトロン株式会社 | 基板処理方法、基板処理システムおよび記憶媒体 |
| JP6022490B2 (ja) | 2013-08-27 | 2016-11-09 | 東京エレクトロン株式会社 | 基板処理方法、基板処理システムおよび記憶媒体 |
| US9895715B2 (en) * | 2014-02-04 | 2018-02-20 | Asm Ip Holding B.V. | Selective deposition of metals, metal oxides, and dielectrics |
| JP6308067B2 (ja) * | 2014-07-29 | 2018-04-11 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US10049921B2 (en) * | 2014-08-20 | 2018-08-14 | Lam Research Corporation | Method for selectively sealing ultra low-k porous dielectric layer using flowable dielectric film formed from vapor phase dielectric precursor |
| JP6425517B2 (ja) | 2014-11-28 | 2018-11-21 | 東京エレクトロン株式会社 | 基板処理方法、基板処理装置および記憶媒体 |
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2017
- 2017-10-18 JP JP2017201978A patent/JP6742287B2/ja active Active
-
2018
- 2018-02-14 TW TW107105617A patent/TWI761455B/zh active
- 2018-02-23 KR KR1020180021733A patent/KR102526306B1/ko active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100215460A1 (en) * | 2007-11-09 | 2010-08-26 | Canon Anelva Corporation | Inline-type wafer conveyance device |
| JP2011151057A (ja) | 2010-01-19 | 2011-08-04 | Fujitsu Semiconductor Ltd | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI761455B (zh) | 2022-04-21 |
| JP2018142691A (ja) | 2018-09-13 |
| TW201837982A (zh) | 2018-10-16 |
| KR20180099504A (ko) | 2018-09-05 |
| JP6742287B2 (ja) | 2020-08-19 |
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