TWI761455B - 半導體製造方法及電漿處理裝置 - Google Patents

半導體製造方法及電漿處理裝置 Download PDF

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Publication number
TWI761455B
TWI761455B TW107105617A TW107105617A TWI761455B TW I761455 B TWI761455 B TW I761455B TW 107105617 A TW107105617 A TW 107105617A TW 107105617 A TW107105617 A TW 107105617A TW I761455 B TWI761455 B TW I761455B
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Taiwan
Prior art keywords
film
gas
semiconductor manufacturing
chamber
vapor pressure
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TW107105617A
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English (en)
Chinese (zh)
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TW201837982A (zh
Inventor
中谷理子
本田昌伸
久松亨
田端雅弘
Original Assignee
日商東京威力科創股份有限公司
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Publication of TW201837982A publication Critical patent/TW201837982A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0431—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

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  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
TW107105617A 2017-02-28 2018-02-14 半導體製造方法及電漿處理裝置 TWI761455B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2017036891 2017-02-28
JP2017-036891 2017-02-28
JP2017201978A JP6742287B2 (ja) 2017-02-28 2017-10-18 半導体製造方法及びプラズマ処理装置
JP2017-201978 2017-10-18

Publications (2)

Publication Number Publication Date
TW201837982A TW201837982A (zh) 2018-10-16
TWI761455B true TWI761455B (zh) 2022-04-21

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TW107105617A TWI761455B (zh) 2017-02-28 2018-02-14 半導體製造方法及電漿處理裝置

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JP (1) JP6742287B2 (https=)
KR (1) KR102526306B1 (https=)
TW (1) TWI761455B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7410065B2 (ja) 2020-03-19 2024-01-09 信越化学工業株式会社 生体電極、生体電極の製造方法及び生体信号の測定方法
JP7096279B2 (ja) 2020-03-25 2022-07-05 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置、プログラム、および基板処理方法
JP7507136B2 (ja) 2020-11-05 2024-06-27 信越化学工業株式会社 生体電極組成物、生体電極、及び生体電極の製造方法
JP7627671B2 (ja) 2021-04-16 2025-02-06 信越化学工業株式会社 生体電極組成物、生体電極、及び生体電極の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090115031A1 (en) * 2006-02-23 2009-05-07 Freescale Semiconductor, Inc. Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device
US20150217330A1 (en) * 2014-02-04 2015-08-06 Asm Ip Holding B.V. Selective deposition of metals, metal oxides, and dielectrics
US20160056071A1 (en) * 2014-08-20 2016-02-25 Lam Research Corporation Flowable dielectric for selective ultra low-k pore sealing

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002270586A (ja) * 2001-03-08 2002-09-20 Tokyo Electron Ltd 有機系絶縁膜のエッチング方法およびデュアルダマシンプロセス
KR20050055074A (ko) * 2003-10-07 2005-06-13 삼성전자주식회사 기상 불산 식각 과정을 이용한 얕은 트렌치 소자 분리형성 방법
JP5047504B2 (ja) * 2005-02-05 2012-10-10 三星電子株式会社 ビアキャッピング保護膜を使用する半導体素子のデュアルダマシン配線の製造方法
CN101855717B (zh) * 2007-11-09 2011-10-19 佳能安内华股份有限公司 在线型晶圆输送装置
JP2010114255A (ja) * 2008-11-06 2010-05-20 Toshiba Corp 半導体装置の製造方法
JP2011134771A (ja) * 2009-12-22 2011-07-07 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
JP2011151057A (ja) * 2010-01-19 2011-08-04 Fujitsu Semiconductor Ltd 半導体装置の製造方法
JP5490753B2 (ja) * 2010-07-29 2014-05-14 東京エレクトロン株式会社 トレンチの埋め込み方法および成膜システム
JP5937632B2 (ja) 2014-02-06 2016-06-22 東京エレクトロン株式会社 基板処理方法、前処理装置、後処理装置、基板処理システムおよび記憶媒体
JP6140576B2 (ja) 2013-08-27 2017-05-31 東京エレクトロン株式会社 基板処理方法、基板処理システムおよび記憶媒体
JP6022490B2 (ja) 2013-08-27 2016-11-09 東京エレクトロン株式会社 基板処理方法、基板処理システムおよび記憶媒体
JP6308067B2 (ja) * 2014-07-29 2018-04-11 富士通セミコンダクター株式会社 半導体装置の製造方法
JP6425517B2 (ja) 2014-11-28 2018-11-21 東京エレクトロン株式会社 基板処理方法、基板処理装置および記憶媒体

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090115031A1 (en) * 2006-02-23 2009-05-07 Freescale Semiconductor, Inc. Semiconductor device including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprising multiple organic components for use in a semiconductor device
US20150217330A1 (en) * 2014-02-04 2015-08-06 Asm Ip Holding B.V. Selective deposition of metals, metal oxides, and dielectrics
US20160056071A1 (en) * 2014-08-20 2016-02-25 Lam Research Corporation Flowable dielectric for selective ultra low-k pore sealing

Also Published As

Publication number Publication date
JP2018142691A (ja) 2018-09-13
TW201837982A (zh) 2018-10-16
KR20180099504A (ko) 2018-09-05
JP6742287B2 (ja) 2020-08-19
KR102526306B1 (ko) 2023-04-26

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