KR101663836B1 - 반도체 집적 회로 장치 및 그 제조 방법 - Google Patents

반도체 집적 회로 장치 및 그 제조 방법 Download PDF

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Publication number
KR101663836B1
KR101663836B1 KR1020100090888A KR20100090888A KR101663836B1 KR 101663836 B1 KR101663836 B1 KR 101663836B1 KR 1020100090888 A KR1020100090888 A KR 1020100090888A KR 20100090888 A KR20100090888 A KR 20100090888A KR 101663836 B1 KR101663836 B1 KR 101663836B1
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KR
South Korea
Prior art keywords
insulating film
film
interconnection layer
layer
fuse element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020100090888A
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English (en)
Korean (ko)
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KR20110033785A (ko
Inventor
유키마사 미나미
마사루 아키노
Original Assignee
에스아이아이 세미컨덕터 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 에스아이아이 세미컨덕터 가부시키가이샤 filed Critical 에스아이아이 세미컨덕터 가부시키가이샤
Publication of KR20110033785A publication Critical patent/KR20110033785A/ko
Application granted granted Critical
Publication of KR101663836B1 publication Critical patent/KR101663836B1/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H10W20/494—Fuses, i.e. interconnections changeable from conductive to non-conductive changeable by the use of an external beam, e.g. laser beam or ion beam

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1020100090888A 2009-09-25 2010-09-16 반도체 집적 회로 장치 및 그 제조 방법 Expired - Fee Related KR101663836B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2009-221238 2009-09-25
JP2009221238A JP5507178B2 (ja) 2009-09-25 2009-09-25 半導体集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
KR20110033785A KR20110033785A (ko) 2011-03-31
KR101663836B1 true KR101663836B1 (ko) 2016-10-14

Family

ID=43779359

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100090888A Expired - Fee Related KR101663836B1 (ko) 2009-09-25 2010-09-16 반도체 집적 회로 장치 및 그 제조 방법

Country Status (5)

Country Link
US (1) US8324708B2 (https=)
JP (1) JP5507178B2 (https=)
KR (1) KR101663836B1 (https=)
CN (1) CN102034791B (https=)
TW (1) TWI555162B (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5981260B2 (ja) * 2011-09-30 2016-08-31 エスアイアイ・セミコンダクタ株式会社 半導体装置
US9818691B2 (en) * 2015-03-12 2017-11-14 Sii Semiconductor Corporation Semiconductor device having a fuse element
US9917055B2 (en) * 2015-03-12 2018-03-13 Sii Semiconductor Corporation Semiconductor device having fuse element
JP6620024B2 (ja) * 2015-03-12 2019-12-11 エイブリック株式会社 半導体装置
JP6620023B2 (ja) * 2015-03-12 2019-12-11 エイブリック株式会社 半導体装置およびその製造方法
JP7158160B2 (ja) * 2018-03-05 2022-10-21 エイブリック株式会社 半導体装置
JP6803595B1 (ja) * 2020-09-16 2020-12-23 アルディーテック株式会社 半導体発光素子チップ集積装置およびその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002050692A (ja) * 2000-08-01 2002-02-15 Nec Corp 半導体装置およびその製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03171758A (ja) * 1989-11-30 1991-07-25 Nec Corp 半導体装置及びその製造方法
JPH0521605A (ja) * 1991-07-12 1993-01-29 Sony Corp 半導体装置
JPH0722508A (ja) * 1993-06-24 1995-01-24 Hitachi Ltd 半導体集積回路装置
JPH0737988A (ja) * 1993-07-20 1995-02-07 Hitachi Ltd 半導体集積回路装置の製造方法
JP3147149B2 (ja) * 1997-02-07 2001-03-19 日本電気株式会社 半導体装置及びその製造方法
US6589712B1 (en) * 1998-11-04 2003-07-08 Yi-Ren Hsu Method for forming a passivation layer using polyimide layer as a mask
CN100501973C (zh) * 2005-03-30 2009-06-17 雅马哈株式会社 适合半导体器件的熔丝断开方法
JP2010118427A (ja) * 2008-11-12 2010-05-27 Nec Electronics Corp 半導体装置および半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002050692A (ja) * 2000-08-01 2002-02-15 Nec Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
KR20110033785A (ko) 2011-03-31
JP5507178B2 (ja) 2014-05-28
JP2011071324A (ja) 2011-04-07
TW201125098A (en) 2011-07-16
CN102034791A (zh) 2011-04-27
US8324708B2 (en) 2012-12-04
US20110073986A1 (en) 2011-03-31
CN102034791B (zh) 2016-02-24
TWI555162B (zh) 2016-10-21

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