KR100686630B1 - 반도체장치 및 패턴형성방법 - Google Patents

반도체장치 및 패턴형성방법 Download PDF

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Publication number
KR100686630B1
KR100686630B1 KR1019990025608A KR19990025608A KR100686630B1 KR 100686630 B1 KR100686630 B1 KR 100686630B1 KR 1019990025608 A KR1019990025608 A KR 1019990025608A KR 19990025608 A KR19990025608 A KR 19990025608A KR 100686630 B1 KR100686630 B1 KR 100686630B1
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South Korea
Prior art keywords
wiring
wirings
word
end side
pattern
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Expired - Fee Related
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KR1019990025608A
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English (en)
Korean (ko)
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KR20000011364A (ko
Inventor
세키구치토모노리
타나카토시히코
야마나카토시아키
사카타타케시
키무라카쯔타카
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가부시키가이샤 히타치세이사쿠쇼
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Publication of KR20000011364A publication Critical patent/KR20000011364A/ko
Priority to KR1020060100427A priority Critical patent/KR100706126B1/ko
Application granted granted Critical
Publication of KR100686630B1 publication Critical patent/KR100686630B1/ko
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Dram (AREA)
KR1019990025608A 1998-07-03 1999-06-30 반도체장치 및 패턴형성방법 Expired - Fee Related KR100686630B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020060100427A KR100706126B1 (ko) 1998-07-03 2006-10-16 반도체장치

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP18851898A JP2000019709A (ja) 1998-07-03 1998-07-03 半導体装置及びパターン形成方法
JP98-188518 1998-07-03

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020060100427A Division KR100706126B1 (ko) 1998-07-03 2006-10-16 반도체장치

Publications (2)

Publication Number Publication Date
KR20000011364A KR20000011364A (ko) 2000-02-25
KR100686630B1 true KR100686630B1 (ko) 2007-02-23

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
KR1019990025608A Expired - Fee Related KR100686630B1 (ko) 1998-07-03 1999-06-30 반도체장치 및 패턴형성방법
KR1020060100427A Expired - Lifetime KR100706126B1 (ko) 1998-07-03 2006-10-16 반도체장치

Family Applications After (1)

Application Number Title Priority Date Filing Date
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Country Status (4)

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US (3) US6495870B1 (enExample)
JP (1) JP2000019709A (enExample)
KR (2) KR100686630B1 (enExample)
TW (1) TW414941B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
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KR100929628B1 (ko) 2006-11-16 2009-12-03 주식회사 하이닉스반도체 상변환 기억 소자

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KR100454131B1 (ko) * 2002-06-05 2004-10-26 삼성전자주식회사 라인형 패턴을 갖는 반도체 소자 및 그 레이아웃 방법
JP2005202102A (ja) * 2004-01-15 2005-07-28 Fujitsu Ltd 露光用マスク及びそのパターン補正方法並びに半導体装置の製造方法
DE102004012553A1 (de) * 2004-03-15 2005-10-13 Infineon Technologies Ag Speicherbauelement mit asymmetrischer Kontaktreihe
US7655387B2 (en) * 2004-09-02 2010-02-02 Micron Technology, Inc. Method to align mask patterns
JP4498088B2 (ja) 2004-10-07 2010-07-07 株式会社東芝 半導体記憶装置およびその製造方法
KR100752644B1 (ko) 2005-04-12 2007-08-29 삼성전자주식회사 반도체 소자의 셀영역 레이아웃 및 이를 이용한 콘택패드제조방법
JP4866652B2 (ja) * 2006-05-10 2012-02-01 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP4127711B2 (ja) * 2006-05-31 2008-07-30 株式会社東芝 半導体メモリ
JP4921884B2 (ja) * 2006-08-08 2012-04-25 株式会社東芝 半導体記憶装置
KR100809332B1 (ko) 2006-09-04 2008-03-05 삼성전자주식회사 반도체 집적 회로 장치 및 그 제조 방법
JP4364226B2 (ja) * 2006-09-21 2009-11-11 株式会社東芝 半導体集積回路
KR100810616B1 (ko) * 2006-10-02 2008-03-06 삼성전자주식회사 미세 선폭의 도전성 라인들을 갖는 반도체소자 및 그제조방법
KR101334174B1 (ko) * 2007-01-12 2013-11-28 삼성전자주식회사 배선 구조체 및 상기 배선 구조체를 포함한 반도체 소자
US7745876B2 (en) 2007-02-21 2010-06-29 Samsung Electronics Co., Ltd. Semiconductor integrated circuit devices including gate patterns having step difference therebetween and a connection line disposed between the gate patterns and methods of fabricating the same
JP4791999B2 (ja) * 2007-04-20 2011-10-12 株式会社東芝 半導体装置
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
JP4504402B2 (ja) * 2007-08-10 2010-07-14 株式会社東芝 不揮発性半導体記憶装置
KR101435520B1 (ko) 2008-08-11 2014-09-01 삼성전자주식회사 반도체 소자 및 반도체 소자의 패턴 형성 방법
KR101540083B1 (ko) 2008-10-22 2015-07-30 삼성전자주식회사 반도체 소자의 패턴 형성 방법
KR101532012B1 (ko) * 2008-12-24 2015-06-30 삼성전자주식회사 반도체 소자 및 반도체 소자의 패턴 형성 방법
US8043964B2 (en) * 2009-05-20 2011-10-25 Micron Technology, Inc. Method for providing electrical connections to spaced conductive lines
KR20110001292A (ko) 2009-06-30 2011-01-06 삼성전자주식회사 패턴 구조물 및 이의 형성 방법
JP5431189B2 (ja) * 2010-01-29 2014-03-05 株式会社東芝 半導体装置
KR101179022B1 (ko) 2010-11-08 2012-08-31 에스케이하이닉스 주식회사 반도체 소자 및 이의 제조 방법
US8603891B2 (en) 2012-01-20 2013-12-10 Micron Technology, Inc. Methods for forming vertical memory devices and apparatuses
JP2013197266A (ja) * 2012-03-19 2013-09-30 Toshiba Corp 半導体装置およびその製造方法
TW201511204A (zh) * 2013-04-09 2015-03-16 Ｐｓ４盧克斯科公司 半導體裝置
US20150179563A1 (en) * 2013-07-22 2015-06-25 Kabushiki Kaisha Toshiba Semiconductor device
US9911693B2 (en) 2015-08-28 2018-03-06 Micron Technology, Inc. Semiconductor devices including conductive lines and methods of forming the semiconductor devices
US9735157B1 (en) 2016-03-18 2017-08-15 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
US9847339B2 (en) * 2016-04-12 2017-12-19 Macronix International Co., Ltd. Self-aligned multiple patterning semiconductor device fabrication
KR102545141B1 (ko) * 2017-12-01 2023-06-20 삼성전자주식회사 반도체 소자 및 그의 제조 방법
US11521697B2 (en) 2019-01-30 2022-12-06 STMicroelectronics International, N.V. Circuit and method for at speed detection of a word line fault condition in a memory circuit
US11393532B2 (en) 2019-04-24 2022-07-19 Stmicroelectronics International N.V. Circuit and method for at speed detection of a word line fault condition in a memory circuit
TWI801752B (zh) * 2020-09-10 2023-05-11 力晶積成電子製造股份有限公司 半導體元件及其製造方法
US11652048B2 (en) * 2021-03-15 2023-05-16 Micron Technology, Inc. Semiconductor device and method for forming the structure of word-line avoiding short circuit thereof
CN115482868B (zh) * 2021-05-31 2025-06-24 长鑫存储技术有限公司 存储器结构和存储器版图
KR102896944B1 (ko) 2021-06-15 2025-12-08 삼성전자주식회사 수직형 반도체 소자
CN113594203B (zh) * 2021-07-27 2024-11-26 长江先进存储产业创新中心有限责任公司 相变存储器及其制作方法、定位方法和掩膜版
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JPH08330536A (ja) * 1995-05-31 1996-12-13 Hitachi Ltd 半導体記憶装置およびこれを用いたコンピュータシステム
JPH09107076A (ja) * 1995-10-11 1997-04-22 Nec Corp 不揮発性半導体記憶装置
JPH09307075A (ja) * 1996-05-15 1997-11-28 Hitachi Ltd 半導体集積回路装置およびその製造方法
JPH09331030A (ja) * 1996-06-11 1997-12-22 Sharp Corp 半導体記憶装置

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JPH09107076A (ja) * 1995-10-11 1997-04-22 Nec Corp 不揮発性半導体記憶装置
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JPH09331030A (ja) * 1996-06-11 1997-12-22 Sharp Corp 半導体記憶装置

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Publication number Priority date Publication date Assignee Title
KR100929628B1 (ko) 2006-11-16 2009-12-03 주식회사 하이닉스반도체 상변환 기억 소자
US7778059B2 (en) 2006-11-16 2010-08-17 Hynix Semiconductor Inc. Phase change memory device having a uniform set and reset current

Also Published As

Publication number Publication date
US6495870B1 (en) 2002-12-17
KR20000011364A (ko) 2000-02-25
KR100706126B1 (ko) 2007-04-13
US7105873B2 (en) 2006-09-12
US20030062550A1 (en) 2003-04-03
JP2000019709A (ja) 2000-01-21
US20060273405A1 (en) 2006-12-07
KR20060126859A (ko) 2006-12-11
TW414941B (en) 2000-12-11
US7582921B2 (en) 2009-09-01

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