JPS6450425A - Formation of fine pattern - Google Patents

Formation of fine pattern

Info

Publication number
JPS6450425A
JPS6450425A JP62206745A JP20674587A JPS6450425A JP S6450425 A JPS6450425 A JP S6450425A JP 62206745 A JP62206745 A JP 62206745A JP 20674587 A JP20674587 A JP 20674587A JP S6450425 A JPS6450425 A JP S6450425A
Authority
JP
Japan
Prior art keywords
photoresist
film
parts
mask
sio2 film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62206745A
Other languages
English (en)
Inventor
Katsuya Okumura
Toru Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62206745A priority Critical patent/JPS6450425A/ja
Priority to DE3856441T priority patent/DE3856441T2/de
Priority to EP88113503A priority patent/EP0304077B1/en
Priority to KR1019880010605A priority patent/KR930001956B1/ko
Priority to US07/234,725 priority patent/US5032491A/en
Publication of JPS6450425A publication Critical patent/JPS6450425A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
JP62206745A 1987-08-20 1987-08-20 Formation of fine pattern Pending JPS6450425A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP62206745A JPS6450425A (en) 1987-08-20 1987-08-20 Formation of fine pattern
DE3856441T DE3856441T2 (de) 1987-08-20 1988-08-19 Methode zur Erzeugung eines feinen Musters
EP88113503A EP0304077B1 (en) 1987-08-20 1988-08-19 Method of forming a fine pattern
KR1019880010605A KR930001956B1 (ko) 1987-08-20 1988-08-20 미세패턴의 형성방법
US07/234,725 US5032491A (en) 1987-08-20 1988-08-22 Method of forming a fine pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62206745A JPS6450425A (en) 1987-08-20 1987-08-20 Formation of fine pattern

Publications (1)

Publication Number Publication Date
JPS6450425A true JPS6450425A (en) 1989-02-27

Family

ID=16528394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62206745A Pending JPS6450425A (en) 1987-08-20 1987-08-20 Formation of fine pattern

Country Status (5)

Country Link
US (1) US5032491A (ja)
EP (1) EP0304077B1 (ja)
JP (1) JPS6450425A (ja)
KR (1) KR930001956B1 (ja)
DE (1) DE3856441T2 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008513229A (ja) * 2004-09-21 2008-05-01 モレキュラー・インプリンツ・インコーポレーテッド インサイチュ嵌込み構造物形成方法
WO2013064498A1 (de) 2011-11-03 2013-05-10 Avl List Gmbh Einlassstrang für eine brennkraftmaschine

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2606900B2 (ja) * 1988-09-08 1997-05-07 株式会社東芝 パターン形成方法
US4996167A (en) * 1990-06-29 1991-02-26 At&T Bell Laboratories Method of making electrical contacts to gate structures in integrated circuits
EP0773477B1 (en) * 1990-09-21 2001-05-30 Dai Nippon Printing Co., Ltd. Process for producing a phase shift photomask
US5330879A (en) * 1992-07-16 1994-07-19 Micron Technology, Inc. Method for fabrication of close-tolerance lines and sharp emission tips on a semiconductor wafer
JP2803999B2 (ja) * 1993-11-10 1998-09-24 現代電子産業株式会社 半導体装置の微細パターン製造法
US5470681A (en) * 1993-12-23 1995-11-28 International Business Machines Corporation Phase shift mask using liquid phase oxide deposition
KR0141941B1 (ko) * 1994-11-11 1998-07-15 문정환 감광막의 패터닝방법
US20090200266A1 (en) * 2008-02-08 2009-08-13 Molecular Imprints, Inc. Template Pillar Formation
US11961738B2 (en) 2021-02-12 2024-04-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing semiconductor devices
CN114420774A (zh) * 2021-11-29 2022-04-29 江苏科来材料科技有限公司 一种晶硅电池的制绒工艺

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893330A (ja) * 1981-11-30 1983-06-03 Toshiba Corp 半導体装置の製造方法
JPS60218843A (ja) * 1984-04-13 1985-11-01 Nippon Telegr & Teleph Corp <Ntt> パタン形成方法
JPS6154629A (ja) * 1984-08-24 1986-03-18 Nec Corp フオト・レジストパタ−ンの形成方法
JPS63111619A (ja) * 1986-10-29 1988-05-16 Mitsubishi Electric Corp 半導体装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58132927A (ja) * 1982-02-03 1983-08-08 Matsushita Electronics Corp パタ−ン形成方法
JPS5976428A (ja) * 1982-10-26 1984-05-01 Nippon Telegr & Teleph Corp <Ntt> 微細パタ−ン形成法
JPS59163829A (ja) * 1983-03-08 1984-09-14 Matsushita Electronics Corp パタ−ン形成方法
JPH0665225B2 (ja) * 1984-01-13 1994-08-22 株式会社東芝 半導体記憶装置の製造方法
US4511430A (en) * 1984-01-30 1985-04-16 International Business Machines Corporation Control of etch rate ratio of SiO2 /photoresist for quartz planarization etch back process
JPS60214532A (ja) * 1984-04-11 1985-10-26 Nippon Telegr & Teleph Corp <Ntt> パタ−ン形成方法
US4634645A (en) * 1984-04-13 1987-01-06 Nippon Telegraph And Telephone Corporation Method of forming resist micropattern
US4707218A (en) * 1986-10-28 1987-11-17 International Business Machines Corporation Lithographic image size reduction
US4732658A (en) * 1986-12-03 1988-03-22 Honeywell Inc. Planarization of silicon semiconductor devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893330A (ja) * 1981-11-30 1983-06-03 Toshiba Corp 半導体装置の製造方法
JPS60218843A (ja) * 1984-04-13 1985-11-01 Nippon Telegr & Teleph Corp <Ntt> パタン形成方法
JPS6154629A (ja) * 1984-08-24 1986-03-18 Nec Corp フオト・レジストパタ−ンの形成方法
JPS63111619A (ja) * 1986-10-29 1988-05-16 Mitsubishi Electric Corp 半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008513229A (ja) * 2004-09-21 2008-05-01 モレキュラー・インプリンツ・インコーポレーテッド インサイチュ嵌込み構造物形成方法
WO2013064498A1 (de) 2011-11-03 2013-05-10 Avl List Gmbh Einlassstrang für eine brennkraftmaschine

Also Published As

Publication number Publication date
EP0304077A3 (en) 1990-07-18
DE3856441D1 (de) 2000-12-14
EP0304077B1 (en) 2000-11-08
EP0304077A2 (en) 1989-02-22
DE3856441T2 (de) 2001-04-05
KR930001956B1 (ko) 1993-03-20
KR890004392A (ko) 1989-04-21
US5032491A (en) 1991-07-16

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