JPS6211977A - 画像メモリ - Google Patents

画像メモリ

Info

Publication number
JPS6211977A
JPS6211977A JP60151976A JP15197685A JPS6211977A JP S6211977 A JPS6211977 A JP S6211977A JP 60151976 A JP60151976 A JP 60151976A JP 15197685 A JP15197685 A JP 15197685A JP S6211977 A JPS6211977 A JP S6211977A
Authority
JP
Japan
Prior art keywords
memory cell
group
memory
clock signal
write
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60151976A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0512755B2 (enExample
Inventor
Seigo Suzuki
鈴木　清吾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60151976A priority Critical patent/JPS6211977A/ja
Priority to US06/883,733 priority patent/US4847809A/en
Priority to EP86109464A priority patent/EP0208325B1/en
Priority to DE86109464T priority patent/DE3689011T2/de
Publication of JPS6211977A publication Critical patent/JPS6211977A/ja
Publication of JPH0512755B2 publication Critical patent/JPH0512755B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/103—Read-write modes for single port memories, i.e. having either a random port or a serial port using serially addressed read-write data registers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Image Input (AREA)
JP60151976A 1985-07-10 1985-07-10 画像メモリ Granted JPS6211977A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP60151976A JPS6211977A (ja) 1985-07-10 1985-07-10 画像メモリ
US06/883,733 US4847809A (en) 1985-07-10 1986-07-09 Image memory having standard dynamic RAM chips
EP86109464A EP0208325B1 (en) 1985-07-10 1986-07-10 Image memory
DE86109464T DE3689011T2 (de) 1985-07-10 1986-07-10 Bildspeicher.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60151976A JPS6211977A (ja) 1985-07-10 1985-07-10 画像メモリ

Publications (2)

Publication Number Publication Date
JPS6211977A true JPS6211977A (ja) 1987-01-20
JPH0512755B2 JPH0512755B2 (enExample) 1993-02-18

Family

ID=15530338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60151976A Granted JPS6211977A (ja) 1985-07-10 1985-07-10 画像メモリ

Country Status (4)

Country Link
US (1) US4847809A (enExample)
EP (1) EP0208325B1 (enExample)
JP (1) JPS6211977A (enExample)
DE (1) DE3689011T2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02276091A (ja) * 1989-04-18 1990-11-09 Matsushita Electric Ind Co Ltd 画像信号記憶装置
JP2001249642A (ja) * 2000-03-02 2001-09-14 Kyocera Corp ビデオ信号処理回路および画像表示装置

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0612609B2 (ja) * 1987-03-27 1994-02-16 株式会社東芝 半導体メモリ
US4899307A (en) * 1987-04-10 1990-02-06 Tandem Computers Incorporated Stack with unary encoded stack pointer
US4918645A (en) * 1987-09-17 1990-04-17 Wang Laboratories, Inc. Computer bus having page mode memory access
EP0321847B1 (en) * 1987-12-21 1994-06-29 Kabushiki Kaisha Toshiba Semiconductor memory capable of improving data rewrite speed
JPH0736162B2 (ja) * 1988-04-18 1995-04-19 株式会社日立製作所 図形処理装置
USRE39529E1 (en) * 1988-04-18 2007-03-27 Renesas Technology Corp. Graphic processing apparatus utilizing improved data transfer to reduce memory size
JPH0261893A (ja) * 1988-08-25 1990-03-01 Toshiba Corp ダイナミック型半導体メモリ
US5150327A (en) * 1988-10-31 1992-09-22 Matsushita Electric Industrial Co., Ltd. Semiconductor memory and video signal processing circuit having the same
JPH03128574A (ja) * 1989-02-16 1991-05-31 Ricoh Co Ltd 疑似中間調処理装置
JP3103575B2 (ja) * 1989-05-26 2000-10-30 松下電器産業株式会社 半導体記憶装置
US7610452B1 (en) * 1989-10-31 2009-10-27 Canon Kabushiki Kaisha Data processing system wherein data is stored in a memory and an external storage in parallel
US5291443A (en) * 1991-06-26 1994-03-01 Micron Technology, Inc. Simultaneous read and refresh of different rows in a dram
US5307314A (en) * 1991-07-15 1994-04-26 Micron Technology, Inc. Split read/write dynamic random access memory
US5486876A (en) * 1993-04-27 1996-01-23 Array Microsystems, Inc. Video interface unit for mapping physical image data to logical tiles
US5506814A (en) * 1993-05-28 1996-04-09 Micron Technology, Inc. Video random access memory device and method implementing independent two WE nibble control
JPH0729376A (ja) * 1993-07-14 1995-01-31 Ricoh Co Ltd 半導体メモリ装置及びデータ読み書き方法
US5594926A (en) * 1993-07-19 1997-01-14 Efar Microsystems, Inc. Hard disk accelerating system for computer
US5453957A (en) * 1993-09-17 1995-09-26 Cypress Semiconductor Corp. Memory architecture for burst mode access
JP3579461B2 (ja) * 1993-10-15 2004-10-20 株式会社ルネサステクノロジ データ処理システム及びデータ処理装置
US6300963B1 (en) * 1993-11-30 2001-10-09 Texas Instruments Incorporated Single-frame display memory for spatial light modulator
US5729245A (en) * 1994-03-21 1998-03-17 Texas Instruments Incorporated Alignment for display having multiple spatial light modulators
JP3380050B2 (ja) * 1994-07-14 2003-02-24 富士通株式会社 半導体記憶装置のデータ読み出し方法
US5506810A (en) * 1994-08-16 1996-04-09 Cirrus Logic, Inc. Dual bank memory and systems using the same
TW330265B (en) 1994-11-22 1998-04-21 Hitachi Ltd Semiconductor apparatus
US5835970A (en) * 1995-12-21 1998-11-10 Cypress Semiconductor Corp. Burst address generator having two modes of operation employing a linear/nonlinear counter using decoded addresses
KR100198541B1 (ko) * 1996-08-26 1999-06-15 구자홍 영상 프레임 데이터를 일 메모리에 저장하는 방법
US5890005A (en) * 1997-06-02 1999-03-30 Nokia Mobile Phones Limited Low power, low interconnect complexity microprocessor and memory interface
US6286062B1 (en) 1997-07-01 2001-09-04 Micron Technology, Inc. Pipelined packet-oriented memory system having a unidirectional command and address bus and a bidirectional data bus
JP4434322B2 (ja) * 1998-02-16 2010-03-17 ソニー株式会社 記憶素子および方法
US6430098B1 (en) 2000-05-16 2002-08-06 Broadcom Corporation Transparent continuous refresh RAM cell architecture
JP4001724B2 (ja) * 2001-03-29 2007-10-31 富士通株式会社 半導体記憶装置
US7330391B2 (en) * 2005-10-17 2008-02-12 Infineon Technologies Ag Memory having directed auto-refresh
JP4909779B2 (ja) * 2006-04-17 2012-04-04 パナソニック株式会社 画像データ転送方法、画像処理装置、及び撮像システム
KR101253443B1 (ko) * 2011-06-09 2013-04-11 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846390A (ja) * 1981-09-14 1983-03-17 シャープ株式会社 複数個接続したｌｓｉのチツプセレクト方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS514467B2 (enExample) * 1972-04-13 1976-02-12
NL7309642A (nl) * 1973-07-11 1975-01-14 Philips Nv Geintegreerd geheugen.
GB1568379A (en) * 1976-02-19 1980-05-29 Micro Consultants Ltd Video store
US4120048A (en) * 1977-12-27 1978-10-10 Rockwell International Corporation Memory with simultaneous sequential and random address modes
JPS6057090B2 (ja) * 1980-09-19 1985-12-13 株式会社日立製作所 データ記憶装置およびそれを用いた処理装置
US4513372A (en) * 1982-11-15 1985-04-23 Data General Corporation Universal memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846390A (ja) * 1981-09-14 1983-03-17 シャープ株式会社 複数個接続したｌｓｉのチツプセレクト方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02276091A (ja) * 1989-04-18 1990-11-09 Matsushita Electric Ind Co Ltd 画像信号記憶装置
JP2001249642A (ja) * 2000-03-02 2001-09-14 Kyocera Corp ビデオ信号処理回路および画像表示装置

Also Published As

Publication number Publication date
DE3689011D1 (de) 1993-10-21
JPH0512755B2 (enExample) 1993-02-18
EP0208325B1 (en) 1993-09-15
EP0208325A3 (en) 1990-08-01
US4847809A (en) 1989-07-11
DE3689011T2 (de) 1994-04-07
EP0208325A2 (en) 1987-01-14

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Legal Events

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