JPS5698874A - Preparation of semiconductor device - Google Patents
Preparation of semiconductor deviceInfo
- Publication number
- JPS5698874A JPS5698874A JP42380A JP42380A JPS5698874A JP S5698874 A JPS5698874 A JP S5698874A JP 42380 A JP42380 A JP 42380A JP 42380 A JP42380 A JP 42380A JP S5698874 A JPS5698874 A JP S5698874A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electrodes
- source
- platinum
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002360 preparation method Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910021339 platinum silicide Inorganic materials 0.000 abstract 3
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical group [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 abstract 2
- 229910045601 alloy Inorganic materials 0.000 abstract 1
- 239000000956 alloy Substances 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052697 platinum Inorganic materials 0.000 abstract 1
- 238000000926 separation method Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Landscapes
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP42380A JPS5698874A (en) | 1980-01-07 | 1980-01-07 | Preparation of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP42380A JPS5698874A (en) | 1980-01-07 | 1980-01-07 | Preparation of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5698874A true JPS5698874A (en) | 1981-08-08 |
| JPS6243552B2 JPS6243552B2 (enrdf_load_stackoverflow) | 1987-09-14 |
Family
ID=11473386
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP42380A Granted JPS5698874A (en) | 1980-01-07 | 1980-01-07 | Preparation of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5698874A (enrdf_load_stackoverflow) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61274359A (ja) * | 1985-04-01 | 1986-12-04 | フエアチヤイルド セミコンダクタ コ−ポレ−シヨン | 小型コンタクト無しｒａｍセル |
| JPH07221096A (ja) * | 1994-01-24 | 1995-08-18 | Lg Semicon Co Ltd | シリサイドプラグ形成方法 |
| JPH08227901A (ja) * | 1995-02-20 | 1996-09-03 | Nec Corp | 半導体装置の製造方法 |
| JP4912886B2 (ja) * | 2003-11-24 | 2012-04-11 | トライクウィント セミコンダクター，インコーポレーテッド | モノリシック集積型エンハンスメントモードおよびデプリーションモードｆｅｔおよびその製造方法 |
-
1980
- 1980-01-07 JP JP42380A patent/JPS5698874A/ja active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61274359A (ja) * | 1985-04-01 | 1986-12-04 | フエアチヤイルド セミコンダクタ コ−ポレ−シヨン | 小型コンタクト無しｒａｍセル |
| JPH07221096A (ja) * | 1994-01-24 | 1995-08-18 | Lg Semicon Co Ltd | シリサイドプラグ形成方法 |
| JPH08227901A (ja) * | 1995-02-20 | 1996-09-03 | Nec Corp | 半導体装置の製造方法 |
| JP4912886B2 (ja) * | 2003-11-24 | 2012-04-11 | トライクウィント セミコンダクター，インコーポレーテッド | モノリシック集積型エンハンスメントモードおよびデプリーションモードｆｅｔおよびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6243552B2 (enrdf_load_stackoverflow) | 1987-09-14 |
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