JPS5759361A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5759361A
JPS5759361A JP13441780A JP13441780A JPS5759361A JP S5759361 A JPS5759361 A JP S5759361A JP 13441780 A JP13441780 A JP 13441780A JP 13441780 A JP13441780 A JP 13441780A JP S5759361 A JPS5759361 A JP S5759361A
Authority
JP
Japan
Prior art keywords
layer
buried layer
silicon
semiconductor device
resistance value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13441780A
Other languages
Japanese (ja)
Inventor
Yoichi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13441780A priority Critical patent/JPS5759361A/en
Publication of JPS5759361A publication Critical patent/JPS5759361A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To increase the operation speed of the semiconductor device by using a buried layer having small resistance value. CONSTITUTION:The surface of a P<-> type silicon substrate 5 is coated with Pt through a thin-film forming method, such as sputtering, evaporation, etc., the whole is thermally treated and one part is combined with silicon and a platinum silicide layer 1 or a mixture layer 8 of Pt and silicon is shaped, and an N<-> type epitaxial layer 9 is formed to the surface. Consequently, the layer 8 is left as the buried layer 10. P<+> isolation regions 11 are shaped, and a transistor such as an NPN transistor is formed. The resistance value of the buried layer 10 is 1OMEGA or lower at every unit area, and is approximately 1/10 of a buried layer by Sb or As.
JP13441780A 1980-09-29 1980-09-29 Semiconductor device Pending JPS5759361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13441780A JPS5759361A (en) 1980-09-29 1980-09-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13441780A JPS5759361A (en) 1980-09-29 1980-09-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5759361A true JPS5759361A (en) 1982-04-09

Family

ID=15127892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13441780A Pending JPS5759361A (en) 1980-09-29 1980-09-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5759361A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60222360A (en) * 1984-04-20 1985-11-06 株式会社京三製作所 Auxiliary stepping device
JPS60170259U (en) * 1984-04-20 1985-11-12 株式会社京三製作所 Auxiliary step device
JPS60170258U (en) * 1984-04-20 1985-11-12 株式会社京三製作所 Auxiliary step device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60222360A (en) * 1984-04-20 1985-11-06 株式会社京三製作所 Auxiliary stepping device
JPS60170259U (en) * 1984-04-20 1985-11-12 株式会社京三製作所 Auxiliary step device
JPS60170258U (en) * 1984-04-20 1985-11-12 株式会社京三製作所 Auxiliary step device

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