JPS5583268A - Complementary mos semiconductor device and method of fabricating the same - Google Patents

Complementary mos semiconductor device and method of fabricating the same

Info

Publication number
JPS5583268A
JPS5583268A JP16082178A JP16082178A JPS5583268A JP S5583268 A JPS5583268 A JP S5583268A JP 16082178 A JP16082178 A JP 16082178A JP 16082178 A JP16082178 A JP 16082178A JP S5583268 A JPS5583268 A JP S5583268A
Authority
JP
Japan
Prior art keywords
regions
film
diffused
type
openings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16082178A
Other languages
Japanese (ja)
Inventor
Ikuo Kawamata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16082178A priority Critical patent/JPS5583268A/en
Publication of JPS5583268A publication Critical patent/JPS5583268A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To eliminate a short-circuit in complementary MOS semiconductor device even if openings perforated at insulating layers for coating a semiconductor substrate are slightly displaced from each other by mounting electrodes through semiconductor layers having the same conductivity as the impurities in the respective regions at the diffused regions exposed through the openings when mounting the electrodes at the regions. CONSTITUTION:An SiO2 film 7 is coated on the surface of an n-type silicon substrate 3, an opening is perforated at the film 7, and p-type well region 4 and p-channel p-type source and drain regions 6 are diffused to be formed in the substrate 3. Then, openings are again perforated in the region 4 of the film 7, and n-channel n-type source and drain regions 5 are diffused to be formed in the region 4. Thereafter the film 7 among the regions is modified into a gate oxide film 8, and openings 11 are perforated on the regions. Then, a polycrystalline silicon layer 12 is accumulated on the entire surface thereof, boron ion is implanted on the p-type diffused retion, and phosphorus ion is implanted on the n-type diffused region to thereby reduce the resistance value thereof, the unnecessary layer 12 is removed, the source and drain electrodes 1 are mounted on the retained layer 12 or the gate electrode 2 is mounted on the film 8.
JP16082178A 1978-12-19 1978-12-19 Complementary mos semiconductor device and method of fabricating the same Pending JPS5583268A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16082178A JPS5583268A (en) 1978-12-19 1978-12-19 Complementary mos semiconductor device and method of fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16082178A JPS5583268A (en) 1978-12-19 1978-12-19 Complementary mos semiconductor device and method of fabricating the same

Publications (1)

Publication Number Publication Date
JPS5583268A true JPS5583268A (en) 1980-06-23

Family

ID=15723135

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16082178A Pending JPS5583268A (en) 1978-12-19 1978-12-19 Complementary mos semiconductor device and method of fabricating the same

Country Status (1)

Country Link
JP (1) JPS5583268A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230365A (en) * 1985-04-19 1987-02-09 Nec Corp Semiconductor device and manufacture thereof
US4735824A (en) * 1985-05-31 1988-04-05 Kabushiki Kaisha Toshiba Method of manufacturing an MOS capacitor
JPS63318753A (en) * 1987-06-22 1988-12-27 Nec Corp Semiconductor device and manufacture thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230365A (en) * 1985-04-19 1987-02-09 Nec Corp Semiconductor device and manufacture thereof
US4735824A (en) * 1985-05-31 1988-04-05 Kabushiki Kaisha Toshiba Method of manufacturing an MOS capacitor
JPS63318753A (en) * 1987-06-22 1988-12-27 Nec Corp Semiconductor device and manufacture thereof

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