JPS55107267A - Manufacture of complementarity mos semiconductor device - Google Patents

Manufacture of complementarity mos semiconductor device

Info

Publication number
JPS55107267A
JPS55107267A JP1375779A JP1375779A JPS55107267A JP S55107267 A JPS55107267 A JP S55107267A JP 1375779 A JP1375779 A JP 1375779A JP 1375779 A JP1375779 A JP 1375779A JP S55107267 A JPS55107267 A JP S55107267A
Authority
JP
Japan
Prior art keywords
region
film
opening
electrode
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1375779A
Other languages
Japanese (ja)
Inventor
Minoru Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1375779A priority Critical patent/JPS55107267A/en
Publication of JPS55107267A publication Critical patent/JPS55107267A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent a wiring electrode from breaking by a method wherein, when forming electrode on the element region of a semiconductor device, the whole surface is covered with an SiO2 film and a PSG film and after providing the element region with an opening, the wall surface of the opening is made smooth by high temperature heat treatment. CONSTITUTION:A p-type well region 102 is formed by diffusion on an n-type Si substrate 101, the surface of the substrate 101 is provided with a thick field film oxide 103 and the substrate 101 is divided to an n-channel region containing the region 102 and a p-channel region not containing the region 102. Next, the region 102 is provided with a gate electrode 106 through a gate insulating film 104 and the other region is provided with a gate electrode 107 through a gate insulating film 105, and under the mask 106 and 107 thereof the n<+>-type source and drain regions 108, 109 as well as the p<+>-type source and drain regions 110, 111 are formed by diffusion on both sides, thereafter the whole surface is covered with the SiO2 film 112 and the PSG film 113, an opening 114 is cut through, the heat treatment of 1000 deg.C is performed in the oxychloride phosphorous gas to make the wall of the opening 114 which is provided with an electrode.
JP1375779A 1979-02-08 1979-02-08 Manufacture of complementarity mos semiconductor device Pending JPS55107267A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1375779A JPS55107267A (en) 1979-02-08 1979-02-08 Manufacture of complementarity mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1375779A JPS55107267A (en) 1979-02-08 1979-02-08 Manufacture of complementarity mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS55107267A true JPS55107267A (en) 1980-08-16

Family

ID=11842114

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1375779A Pending JPS55107267A (en) 1979-02-08 1979-02-08 Manufacture of complementarity mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS55107267A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842254A (en) * 1981-09-07 1983-03-11 Nec Corp Manufacture of semiconductor device
JPS63111668A (en) * 1986-10-30 1988-05-16 Mitsubishi Electric Corp Semiconductor device and manufacture of the same
JPH01191468A (en) * 1988-01-27 1989-08-01 Nec Corp Manufacture of cmos type semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842254A (en) * 1981-09-07 1983-03-11 Nec Corp Manufacture of semiconductor device
JPS63111668A (en) * 1986-10-30 1988-05-16 Mitsubishi Electric Corp Semiconductor device and manufacture of the same
JPH01191468A (en) * 1988-01-27 1989-08-01 Nec Corp Manufacture of cmos type semiconductor device

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