JPS5578574A - Manufacture of insulated-gate field-effect transistor - Google Patents

Manufacture of insulated-gate field-effect transistor

Info

Publication number
JPS5578574A
JPS5578574A JP15286078A JP15286078A JPS5578574A JP S5578574 A JPS5578574 A JP S5578574A JP 15286078 A JP15286078 A JP 15286078A JP 15286078 A JP15286078 A JP 15286078A JP S5578574 A JPS5578574 A JP S5578574A
Authority
JP
Japan
Prior art keywords
windows
diffused
window
insulated
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15286078A
Other languages
Japanese (ja)
Other versions
JPS6143866B2 (en
Inventor
Katsumi Toma
Masazumi Setoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP15286078A priority Critical patent/JPS5578574A/en
Publication of JPS5578574A publication Critical patent/JPS5578574A/en
Publication of JPS6143866B2 publication Critical patent/JPS6143866B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)

Abstract

PURPOSE: To decrease the number of manufacturing processes by forming a channel region and a source region by impurity diffusion to the depth which is more than a half the distance to the opposing diffusion window and impurity diffusion to the depth which is less than a half the distance to the opposing diffusion window, from the same diffusion window.
CONSTITUTION: An oxide film 21 is formed on a substrate 20 (a), concentric windows 22 are opened (b), p-type impurities are diffused from said windows, and p-type diffused regions are formed so that portions of the individual regions 23 are overlapped (c). Then, n-type impurities are diffused from the windows 22 and n-type diffused regions 24 are formed, thereby a source region is formed (d). Thereafter, an oxide film 25 is formed (e), concentric windows 26 are opened (f), and gate oxide films 27 are formed (g). A source contact window 28 is formed at the center (h), and a source electrode 29, a gate electrode 30, and a drain electrode 31 are formed by evaporating aluminum.
COPYRIGHT: (C)1980,JPO&Japio
JP15286078A 1978-12-09 1978-12-09 Manufacture of insulated-gate field-effect transistor Granted JPS5578574A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15286078A JPS5578574A (en) 1978-12-09 1978-12-09 Manufacture of insulated-gate field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15286078A JPS5578574A (en) 1978-12-09 1978-12-09 Manufacture of insulated-gate field-effect transistor

Publications (2)

Publication Number Publication Date
JPS5578574A true JPS5578574A (en) 1980-06-13
JPS6143866B2 JPS6143866B2 (en) 1986-09-30

Family

ID=15549696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15286078A Granted JPS5578574A (en) 1978-12-09 1978-12-09 Manufacture of insulated-gate field-effect transistor

Country Status (1)

Country Link
JP (1) JPS5578574A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5947770A (en) * 1982-08-09 1984-03-17 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Semiconductor device
US4801986A (en) * 1987-04-03 1989-01-31 General Electric Company Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method
US4823176A (en) * 1987-04-03 1989-04-18 General Electric Company Vertical double diffused metal oxide semiconductor (VDMOS) device including high voltage junction exhibiting increased safe operating area
JPH01194364A (en) * 1988-01-28 1989-08-04 Nec Corp Longitudinal type high dielectric strength semiconductor device
JPH01262668A (en) * 1988-04-13 1989-10-19 Mitsubishi Electric Corp Field-effect type semiconductor device
US4883767A (en) * 1986-12-05 1989-11-28 General Electric Company Method of fabricating self aligned semiconductor devices
JP2006510206A (en) * 2002-12-10 2006-03-23 フェアチャイルド・セミコンダクター・コーポレーション Integrated circuit structure

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021513755A (en) * 2019-01-15 2021-05-27 エルジー エレクトロニクス インコーポレイティド Video coding method and device using conversion skip flag

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5947770A (en) * 1982-08-09 1984-03-17 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Semiconductor device
US4883767A (en) * 1986-12-05 1989-11-28 General Electric Company Method of fabricating self aligned semiconductor devices
US4801986A (en) * 1987-04-03 1989-01-31 General Electric Company Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method
US4823176A (en) * 1987-04-03 1989-04-18 General Electric Company Vertical double diffused metal oxide semiconductor (VDMOS) device including high voltage junction exhibiting increased safe operating area
JPH01194364A (en) * 1988-01-28 1989-08-04 Nec Corp Longitudinal type high dielectric strength semiconductor device
JPH01262668A (en) * 1988-04-13 1989-10-19 Mitsubishi Electric Corp Field-effect type semiconductor device
JP2006510206A (en) * 2002-12-10 2006-03-23 フェアチャイルド・セミコンダクター・コーポレーション Integrated circuit structure

Also Published As

Publication number Publication date
JPS6143866B2 (en) 1986-09-30

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