JPS56126936A - Semiconductor device and production thereof - Google Patents

Semiconductor device and production thereof

Info

Publication number
JPS56126936A
JPS56126936A JP3129180A JP3129180A JPS56126936A JP S56126936 A JPS56126936 A JP S56126936A JP 3129180 A JP3129180 A JP 3129180A JP 3129180 A JP3129180 A JP 3129180A JP S56126936 A JPS56126936 A JP S56126936A
Authority
JP
Japan
Prior art keywords
sio
layer
etched
poly
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3129180A
Other languages
English (en)
Inventor
Kenji Maeguchi
Hiroyuki Tango
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3129180A priority Critical patent/JPS56126936A/ja
Priority to US06/240,850 priority patent/US4447823A/en
Priority to DE19813109074 priority patent/DE3109074A1/de
Priority to FR8104986A priority patent/FR2478376A1/fr
Publication of JPS56126936A publication Critical patent/JPS56126936A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76272Vertical isolation by lateral overgrowth techniques, i.e. ELO techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281Lateral isolation by selective oxidation of silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
JP3129180A 1980-03-12 1980-03-12 Semiconductor device and production thereof Pending JPS56126936A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP3129180A JPS56126936A (en) 1980-03-12 1980-03-12 Semiconductor device and production thereof
US06/240,850 US4447823A (en) 1980-03-12 1981-03-05 SOS p--n Junction device with a thick oxide wiring insulation layer
DE19813109074 DE3109074A1 (de) 1980-03-12 1981-03-10 Halbleitervorrichtung und verfahren zu ihrer herstellung
FR8104986A FR2478376A1 (fr) 1980-03-12 1981-03-12 Dispositif semi-conducteur du type cellule de memorisation a transistor a enrichissement et resistance, et son procede de fabrication

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3129180A JPS56126936A (en) 1980-03-12 1980-03-12 Semiconductor device and production thereof

Publications (1)

Publication Number Publication Date
JPS56126936A true JPS56126936A (en) 1981-10-05

Family

ID=12327197

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3129180A Pending JPS56126936A (en) 1980-03-12 1980-03-12 Semiconductor device and production thereof

Country Status (4)

Country Link
US (1) US4447823A (ja)
JP (1) JPS56126936A (ja)
DE (1) DE3109074A1 (ja)
FR (1) FR2478376A1 (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS582068A (ja) * 1981-06-26 1983-01-07 Toshiba Corp 半導体装置およびその製造方法
JPS5812365A (ja) * 1981-07-15 1983-01-24 Japan Electronic Ind Dev Assoc<Jeida> 薄膜トランジスタ及びその製造方法
US4897698A (en) * 1984-10-31 1990-01-30 Texas Instruments Incorporated Horizontal structure thin film transistor
US4751554A (en) * 1985-09-27 1988-06-14 Rca Corporation Silicon-on-sapphire integrated circuit and method of making the same
US4758529A (en) * 1985-10-31 1988-07-19 Rca Corporation Method of forming an improved gate dielectric for a MOSFET on an insulating substrate
US4722912A (en) * 1986-04-28 1988-02-02 Rca Corporation Method of forming a semiconductor structure
US4735917A (en) * 1986-04-28 1988-04-05 General Electric Company Silicon-on-sapphire integrated circuits
US4755481A (en) * 1986-05-15 1988-07-05 General Electric Company Method of making a silicon-on-insulator transistor
US4989061A (en) * 1986-09-05 1991-01-29 General Electric Company Radiation hard memory cell structure with drain shielding
US5019525A (en) * 1987-08-18 1991-05-28 Texas Instruments Incorporated Method for forming a horizontal self-aligned transistor
US5736777A (en) * 1995-12-29 1998-04-07 Intel Corporation Method and apparatus for fast self-destruction of a CMOS integrated circuit
JP3260660B2 (ja) * 1996-08-22 2002-02-25 株式会社東芝 半導体装置およびその製造方法
EP1020920B1 (en) * 1999-01-11 2010-06-02 Sel Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having a driver TFT and a pixel TFT on a common substrate
US6225666B1 (en) * 1999-10-29 2001-05-01 National Semiconductor Corporation Low stress active area silicon island structure with a non-rectangular cross-section profile and method for its formation
JP2002246600A (ja) * 2001-02-13 2002-08-30 Mitsubishi Electric Corp 半導体装置及びその製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2105479A1 (de) * 1971-02-05 1972-08-10 Siemens Ag Schaltung und Aufbau eines Halbleiterspeicherelementes
JPS52101967A (en) * 1976-02-23 1977-08-26 Agency Of Ind Science & Technol Semiconductor device
US4087902A (en) * 1976-06-23 1978-05-09 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Field effect transistor and method of construction thereof
JPS5327278A (en) * 1976-08-27 1978-03-14 Hitachi Ltd Device for energizing electric discharge lamp
DE2643931A1 (de) * 1976-09-29 1978-03-30 Siemens Ag In integrierter technik hergestellter baustein
US4169746A (en) * 1977-04-28 1979-10-02 Rca Corp. Method for making silicon on sapphire transistor utilizing predeposition of leads
IT7826422A0 (it) * 1977-09-22 1978-08-02 Rca Corp Circuito integrato planare a silicio su zaffiro (sos) e metodo per la fabbricazione dello stesso.
JPS54130883A (en) * 1978-04-01 1979-10-11 Agency Of Ind Science & Technol Production of semiconductor device
US4320312A (en) * 1978-10-02 1982-03-16 Hewlett-Packard Company Smaller memory cells and logic circuits
JPS55160457A (en) * 1979-03-30 1980-12-13 Toshiba Corp Semiconductor device
US4253162A (en) * 1979-08-28 1981-02-24 Rca Corporation Blocked source node field-effect circuitry

Also Published As

Publication number Publication date
DE3109074C2 (ja) 1989-04-06
US4447823A (en) 1984-05-08
FR2478376A1 (fr) 1981-09-18
FR2478376B1 (ja) 1983-12-23
DE3109074A1 (de) 1982-02-25

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