JPS55163878A - Insulated gate type field effect transistor - Google Patents

Insulated gate type field effect transistor

Info

Publication number
JPS55163878A
JPS55163878A JP7140679A JP7140679A JPS55163878A JP S55163878 A JPS55163878 A JP S55163878A JP 7140679 A JP7140679 A JP 7140679A JP 7140679 A JP7140679 A JP 7140679A JP S55163878 A JPS55163878 A JP S55163878A
Authority
JP
Japan
Prior art keywords
gate
gate electrode
air gap
field effect
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7140679A
Other languages
Japanese (ja)
Inventor
Isamu Miyagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7140679A priority Critical patent/JPS55163878A/en
Priority to US06/127,337 priority patent/US4343078A/en
Publication of JPS55163878A publication Critical patent/JPS55163878A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/66583Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with initial gate mask or masking layer complementary to the prospective gate location, e.g. with dummy source and drain contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To increase the freedom degree of designing a pattern in an insulated gate type field effect transistor by connecting a gate electrode to the gate wire of the same layer on a gate insulating film and stereoscopically intersecting it with the drain region to be externally led out. CONSTITUTION:There are formed an air gap 9 and a gate electrode 7 as obtained by removing a silicon dioxide film 2 and a silicon nitride film on a silicon substrate. After then impregnating phosphorus into the substrate, it is thermally oxidized to the degree of burying the air gap 9 with silicon dioxide to form N-type conducting diffused layers 10, 11, 12, and simultaneously altering the N-type conducting semiconductor from polycrystalline silicon film piece coated in the previous step to form a gate electrode 7 and a gate lead 8. At this time since the layers 11, 12 are impregnated with phosphorus even in the region under the lead 8 at the time of diffusing it from the air gap 9 to form a diffused layer 13, it is electrically connected. Since it can arbitrarily determine the leading direction of the gate electrode, it can increase the freedom degree of designing the pattern.
JP7140679A 1979-03-05 1979-06-07 Insulated gate type field effect transistor Pending JPS55163878A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP7140679A JPS55163878A (en) 1979-06-07 1979-06-07 Insulated gate type field effect transistor
US06/127,337 US4343078A (en) 1979-03-05 1980-03-05 IGFET Forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7140679A JPS55163878A (en) 1979-06-07 1979-06-07 Insulated gate type field effect transistor

Publications (1)

Publication Number Publication Date
JPS55163878A true JPS55163878A (en) 1980-12-20

Family

ID=13459594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7140679A Pending JPS55163878A (en) 1979-03-05 1979-06-07 Insulated gate type field effect transistor

Country Status (1)

Country Link
JP (1) JPS55163878A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5479034A (en) * 1991-04-08 1995-12-26 Texas Instruments Incorporated Method of making gate array base cell

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5479034A (en) * 1991-04-08 1995-12-26 Texas Instruments Incorporated Method of making gate array base cell
US5939740A (en) * 1991-04-08 1999-08-17 Texas Instruments Incorporated Gate array base cell

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