JPS6437058A - Insulated-gate field-effect transistor - Google Patents

Insulated-gate field-effect transistor

Info

Publication number
JPS6437058A
JPS6437058A JP62193462A JP19346287A JPS6437058A JP S6437058 A JPS6437058 A JP S6437058A JP 62193462 A JP62193462 A JP 62193462A JP 19346287 A JP19346287 A JP 19346287A JP S6437058 A JPS6437058 A JP S6437058A
Authority
JP
Japan
Prior art keywords
substrate
recessed part
semiconductor layer
drain region
source region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62193462A
Other languages
Japanese (ja)
Inventor
Koichi Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP62193462A priority Critical patent/JPS6437058A/en
Publication of JPS6437058A publication Critical patent/JPS6437058A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To obtain an insulated-gate field-effect transistor which is small in a chip size, the most adequate in a gate length, and excellent in reliability by a method wherein a recessed part is provided vertically in a substrate extending from a source region to a drain region and a conductor is embedded in the recessed part through the intermediary of an insulating film. CONSTITUTION:An intermediate semiconductor layer 5 of a type opposite to a substrate 1 is formed on a part of the substrate 1 which is to be a drain region and a source region 7 of the same type as the substrate 1 is built on the intermediate semiconductor layer 5. In addition, a recessed part is built vertically in the substrate 1 extending from the source region to the drain region and a conductor 4' is embedded in the recessed part through the intermediary of an insulating film. Therefore, the intermediate semiconductor layer 5 is formed between the drain region 1 and the source region 7, and the conductor 4' is provided to the cross section of this three-layered semiconductor layer through the intermediary of an insulating film. In such a structure, each channel forming region is isolated from each other by means of the recessed part, wherefore each cell does not need to be widely spaced and a larger current can flow the same area, so that a chip size can be reduced.
JP62193462A 1987-07-31 1987-07-31 Insulated-gate field-effect transistor Pending JPS6437058A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62193462A JPS6437058A (en) 1987-07-31 1987-07-31 Insulated-gate field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62193462A JPS6437058A (en) 1987-07-31 1987-07-31 Insulated-gate field-effect transistor

Publications (1)

Publication Number Publication Date
JPS6437058A true JPS6437058A (en) 1989-02-07

Family

ID=16308407

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62193462A Pending JPS6437058A (en) 1987-07-31 1987-07-31 Insulated-gate field-effect transistor

Country Status (1)

Country Link
JP (1) JPS6437058A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5034785A (en) * 1986-03-24 1991-07-23 Siliconix Incorporated Planar vertical channel DMOS structure
JP2009004804A (en) * 2008-09-01 2009-01-08 Renesas Technology Corp Semiconductor device
US8748266B2 (en) 1997-08-28 2014-06-10 Renesas Electronics Corporation Method of fabricating semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62115775A (en) * 1985-11-15 1987-05-27 Nec Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62115775A (en) * 1985-11-15 1987-05-27 Nec Corp Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5034785A (en) * 1986-03-24 1991-07-23 Siliconix Incorporated Planar vertical channel DMOS structure
US8748266B2 (en) 1997-08-28 2014-06-10 Renesas Electronics Corporation Method of fabricating semiconductor device
US9275863B2 (en) 1997-08-28 2016-03-01 Renesas Electronics Corporation Method of fabricating semiconductor device
JP2009004804A (en) * 2008-09-01 2009-01-08 Renesas Technology Corp Semiconductor device

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