JPH11135779A5 - - Google Patents

Info

Publication number
JPH11135779A5
JPH11135779A5 JP1997295420A JP29542097A JPH11135779A5 JP H11135779 A5 JPH11135779 A5 JP H11135779A5 JP 1997295420 A JP1997295420 A JP 1997295420A JP 29542097 A JP29542097 A JP 29542097A JP H11135779 A5 JPH11135779 A5 JP H11135779A5
Authority
JP
Japan
Prior art keywords
mis transistor
conductivity type
type mis
cap layer
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997295420A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11135779A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP9295420A priority Critical patent/JPH11135779A/ja
Priority claimed from JP9295420A external-priority patent/JPH11135779A/ja
Priority to TW087117644A priority patent/TW402818B/zh
Priority to US09/179,318 priority patent/US6300178B1/en
Priority to KR1019980045062A priority patent/KR100280167B1/ko
Publication of JPH11135779A publication Critical patent/JPH11135779A/ja
Publication of JPH11135779A5 publication Critical patent/JPH11135779A5/ja
Pending legal-status Critical Current

Links

JP9295420A 1997-10-28 1997-10-28 半導体装置及びその製造方法 Pending JPH11135779A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP9295420A JPH11135779A (ja) 1997-10-28 1997-10-28 半導体装置及びその製造方法
TW087117644A TW402818B (en) 1997-10-28 1998-10-26 Semiconductor device and method for manufacturing the same
US09/179,318 US6300178B1 (en) 1997-10-28 1998-10-27 Semiconductor device with self-aligned contact and manufacturing method thereof
KR1019980045062A KR100280167B1 (ko) 1997-10-28 1998-10-27 반도체장치 및 그 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9295420A JPH11135779A (ja) 1997-10-28 1997-10-28 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JPH11135779A JPH11135779A (ja) 1999-05-21
JPH11135779A5 true JPH11135779A5 (enExample) 2005-04-07

Family

ID=17820383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9295420A Pending JPH11135779A (ja) 1997-10-28 1997-10-28 半導体装置及びその製造方法

Country Status (4)

Country Link
US (1) US6300178B1 (enExample)
JP (1) JPH11135779A (enExample)
KR (1) KR100280167B1 (enExample)
TW (1) TW402818B (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6387759B1 (en) * 1998-05-18 2002-05-14 Hyundai Electronics Industries Co., Ltd. Method of fabricating a semiconductor device
KR100328810B1 (ko) * 1999-07-08 2002-03-14 윤종용 반도체 장치를 위한 콘택 구조 및 제조 방법
US6399470B1 (en) * 2000-10-05 2002-06-04 Oki Electronic Industry Co., Ltd. Method for forming contact holes on conductors having a protective layer using selective etching
US6475906B1 (en) * 2001-07-05 2002-11-05 Promos Technologies, Inc. Gate contact etch sequence and plasma doping method for sub-150 NM DT-based DRAM devices
US6730553B2 (en) 2001-08-30 2004-05-04 Micron Technology, Inc. Methods for making semiconductor structures having high-speed areas and high-density areas
US6909152B2 (en) * 2002-11-14 2005-06-21 Infineon Technologies, Ag High density DRAM with reduced peripheral device area and method of manufacture
US6828238B1 (en) * 2003-06-03 2004-12-07 Micron Technology, Inc. Methods of forming openings extending through electrically insulative material to electrically conductive material
DE102004020938B3 (de) * 2004-04-28 2005-09-08 Infineon Technologies Ag Verfahren zum Herstellen einer ersten Kontaktlochebene in einem Speicherbaustein
TWI242797B (en) * 2004-06-01 2005-11-01 Nanya Technology Corp Method for forming self-aligned contact of semiconductor device
KR100753414B1 (ko) 2006-02-24 2007-08-30 주식회사 하이닉스반도체 반도체 소자의 제조방법
US8563425B2 (en) * 2009-06-01 2013-10-22 Advanced Micro Devices Selective local interconnect to gate in a self aligned local interconnect process

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5294822A (en) * 1989-07-10 1994-03-15 Texas Instruments Incorporated Polycide local interconnect method and structure
JP2643907B2 (ja) * 1995-05-12 1997-08-25 日本電気株式会社 半導体装置の製造方法
US5637525A (en) * 1995-10-20 1997-06-10 Micron Technology, Inc. Method of forming a CMOS circuitry
US5718800A (en) * 1995-11-08 1998-02-17 Micron Technology, Inc. Self-aligned N+/P+ doped polysilicon plugged contacts to N+/P+ doped polysilicon gates and to N+/P+ doped source/drain regions
KR100192521B1 (ko) * 1996-07-19 1999-06-15 구본준 반도체장치의 제조방법
TW368731B (en) * 1997-12-22 1999-09-01 United Microelectronics Corp Manufacturing method for self-aligned local-interconnect and contact

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