JPH10303289A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

Info

Publication number
JPH10303289A
JPH10303289A JP9112467A JP11246797A JPH10303289A JP H10303289 A JPH10303289 A JP H10303289A JP 9112467 A JP9112467 A JP 9112467A JP 11246797 A JP11246797 A JP 11246797A JP H10303289 A JPH10303289 A JP H10303289A
Authority
JP
Japan
Prior art keywords
oxide film
silicon oxide
groove
semiconductor substrate
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9112467A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10303289A5 (https=
Inventor
Yasushi Matsuda
安司 松田
Hideo Miura
英生 三浦
Hirohiko Yamamoto
裕彦 山本
Masamichi Kobayashi
正道 小林
Shuji Ikeda
修二 池田
Akira Takamatsu
朗 高松
Norio Suzuki
範夫 鈴木
Hirobumi Shimizu
博文 清水
Yasuko Yoshida
安子 吉田
Kazuji Fukuda
和司 福田
Shinichi Horibe
晋一 堀部
Toshio Nozoe
俊夫 野添
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Solutions Technology Ltd
Original Assignee
Hitachi Ltd
Hitachi ULSI Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi ULSI Systems Co Ltd filed Critical Hitachi Ltd
Priority to JP9112467A priority Critical patent/JPH10303289A/ja
Priority to TW087102181A priority patent/TW388100B/zh
Priority to CNB031306020A priority patent/CN100521146C/zh
Priority to PCT/JP1998/000671 priority patent/WO1998036452A1/en
Priority to CN98802666A priority patent/CN1112727C/zh
Priority to CNB021571880A priority patent/CN1284224C/zh
Priority to US09/367,524 priority patent/US6242323B1/en
Priority to US09/066,757 priority patent/US6057241A/en
Priority to KR1019980015280A priority patent/KR19980081825A/ko
Priority to TW087106611A priority patent/TW418492B/zh
Priority to MYPI98000689A priority patent/MY121321A/en
Publication of JPH10303289A publication Critical patent/JPH10303289A/ja
Priority to KR1019997007482A priority patent/KR100307000B1/ko
Priority to US09/845,338 priority patent/US6559027B2/en
Priority to US10/392,916 priority patent/US6881646B2/en
Publication of JPH10303289A5 publication Critical patent/JPH10303289A5/ja
Priority to US11/108,827 priority patent/US7402473B2/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0148—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0143—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising concurrently refilling multiple trenches having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
    • H10W10/0147—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape the shapes being altered by a local oxidation of silicon process, e.g. trench corner rounding by LOCOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

Landscapes

  • Element Separation (AREA)
JP9112467A 1997-02-18 1997-04-30 半導体集積回路装置の製造方法 Pending JPH10303289A (ja)

Priority Applications (15)

Application Number Priority Date Filing Date Title
JP9112467A JPH10303289A (ja) 1997-04-30 1997-04-30 半導体集積回路装置の製造方法
TW087102181A TW388100B (en) 1997-02-18 1998-02-17 Semiconductor deivce and process for producing the same
CNB031306020A CN100521146C (zh) 1997-02-18 1998-02-18 半导体器件的制造工艺
PCT/JP1998/000671 WO1998036452A1 (en) 1997-02-18 1998-02-18 Semiconductor device and process for producing the same
CN98802666A CN1112727C (zh) 1997-02-18 1998-02-18 半导体器件及其制造工艺
CNB021571880A CN1284224C (zh) 1997-02-18 1998-02-18 半导体器件及其制造工艺
US09/367,524 US6242323B1 (en) 1997-02-18 1998-02-18 Semiconductor device and process for producing the same
US09/066,757 US6057241A (en) 1997-04-30 1998-04-27 Method of manufacturing a semiconductor integrated circuit device
KR1019980015280A KR19980081825A (ko) 1997-04-30 1998-04-29 반도체 집적회로장치의 제조방법
TW087106611A TW418492B (en) 1997-04-30 1998-04-29 Method of manufacturing a semiconductor integrated circuit device
MYPI98000689A MY121321A (en) 1997-02-18 1998-08-11 Semiconductor device and process for producing the same
KR1019997007482A KR100307000B1 (ko) 1997-02-18 1999-08-18 반도체 장치 및 그 제조 공정
US09/845,338 US6559027B2 (en) 1997-02-18 2001-05-01 Semiconductor device and process for producing the sme
US10/392,916 US6881646B2 (en) 1997-02-18 2003-03-21 Semiconductor device and process for producing the same
US11/108,827 US7402473B2 (en) 1997-02-18 2005-04-19 Semiconductor device and process for producing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9112467A JPH10303289A (ja) 1997-04-30 1997-04-30 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JPH10303289A true JPH10303289A (ja) 1998-11-13
JPH10303289A5 JPH10303289A5 (https=) 2005-02-10

Family

ID=14587379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9112467A Pending JPH10303289A (ja) 1997-02-18 1997-04-30 半導体集積回路装置の製造方法

Country Status (4)

Country Link
US (1) US6057241A (https=)
JP (1) JPH10303289A (https=)
KR (1) KR19980081825A (https=)
TW (1) TW418492B (https=)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001144170A (ja) * 1999-11-11 2001-05-25 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2001332613A (ja) * 2000-05-24 2001-11-30 Nec Corp 半導体装置の製造方法
KR100345400B1 (ko) * 1999-10-08 2002-07-26 한국전자통신연구원 가장자리에 두꺼운 산화막을 갖는 트렌치 형성방법
US6518144B2 (en) 2000-10-10 2003-02-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having trenches and process for same
JP2003249546A (ja) * 2003-01-06 2003-09-05 Seiko Epson Corp 半導体ウエハおよびその処理方法ならびに半導体装置の製造方法
JP2004510330A (ja) * 2000-09-18 2004-04-02 モトローラ・インコーポレイテッド 半導体装置及びその形成プロセス
JP2005347636A (ja) * 2004-06-04 2005-12-15 Az Electronic Materials Kk トレンチ・アイソレーション構造の形成方法
JP2007184609A (ja) * 2005-12-29 2007-07-19 Dongbu Electronics Co Ltd トレンチ形成方法
JP2009283493A (ja) * 2008-05-19 2009-12-03 Seiko Epson Corp 半導体装置の製造方法
JP2009283494A (ja) * 2008-05-19 2009-12-03 Seiko Epson Corp 半導体装置の製造方法
JP2009283492A (ja) * 2008-05-19 2009-12-03 Seiko Epson Corp 半導体装置の製造方法

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4592837B2 (ja) * 1998-07-31 2010-12-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2000082808A (ja) * 1998-09-04 2000-03-21 Toshiba Corp 半導体装置及びその製造方法
US6599812B1 (en) * 1998-10-23 2003-07-29 Stmicroelectronics S.R.L. Manufacturing method for a thick oxide layer
JP3571236B2 (ja) * 1998-11-09 2004-09-29 株式会社ルネサステクノロジ 半導体装置の製造方法
JP3955404B2 (ja) * 1998-12-28 2007-08-08 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP4012350B2 (ja) * 1999-10-06 2007-11-21 株式会社ルネサステクノロジ 半導体集積回路装置およびその製造方法
JP2001345375A (ja) * 2000-05-31 2001-12-14 Miyazaki Oki Electric Co Ltd 半導体装置および半導体装置の製造方法
US6451704B1 (en) * 2001-05-07 2002-09-17 Chartered Semiconductor Manufacturing Ltd. Method for forming PLDD structure with minimized lateral dopant diffusion
ITTO20011038A1 (it) * 2001-10-30 2003-04-30 St Microelectronics Srl Procedimento per la fabbricazione di una fetta semiconduttrice integrante dispositivi elettronici e una struttura per il disaccoppiamento el
JP4173672B2 (ja) * 2002-03-19 2008-10-29 株式会社ルネサステクノロジ 半導体装置及びその製造方法
DE10259728B4 (de) * 2002-12-19 2008-01-17 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung einer Grabenisolationsstruktur und Verfahren zum Steuern eines Grades an Kantenrundung einer Grabenisolationsstruktur in einem Halbleiterbauelement
JP2006332404A (ja) * 2005-05-27 2006-12-07 Seiko Epson Corp 半導体装置の製造方法及び半導体装置
WO2020098738A1 (en) * 2018-11-16 2020-05-22 Changxin Memory Technologies, Inc. Semiconductor device and fabricating method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4576834A (en) * 1985-05-20 1986-03-18 Ncr Corporation Method for forming trench isolation structures
US4693781A (en) * 1986-06-26 1987-09-15 Motorola, Inc. Trench formation process
JPH07105436B2 (ja) * 1986-07-18 1995-11-13 株式会社東芝 半導体装置の製造方法
US4906585A (en) * 1987-08-04 1990-03-06 Siemens Aktiengesellschaft Method for manufacturing wells for CMOS transistor circuits separated by insulating trenches

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100345400B1 (ko) * 1999-10-08 2002-07-26 한국전자통신연구원 가장자리에 두꺼운 산화막을 갖는 트렌치 형성방법
JP2001144170A (ja) * 1999-11-11 2001-05-25 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP2001332613A (ja) * 2000-05-24 2001-11-30 Nec Corp 半導体装置の製造方法
JP2004510330A (ja) * 2000-09-18 2004-04-02 モトローラ・インコーポレイテッド 半導体装置及びその形成プロセス
US6518144B2 (en) 2000-10-10 2003-02-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having trenches and process for same
JP2003249546A (ja) * 2003-01-06 2003-09-05 Seiko Epson Corp 半導体ウエハおよびその処理方法ならびに半導体装置の製造方法
JP2005347636A (ja) * 2004-06-04 2005-12-15 Az Electronic Materials Kk トレンチ・アイソレーション構造の形成方法
WO2005119758A1 (ja) * 2004-06-04 2005-12-15 Az Electronic Materials (Japan) K.K. トレンチ・アイソレーション構造の形成方法
JP2007184609A (ja) * 2005-12-29 2007-07-19 Dongbu Electronics Co Ltd トレンチ形成方法
JP2009283493A (ja) * 2008-05-19 2009-12-03 Seiko Epson Corp 半導体装置の製造方法
JP2009283494A (ja) * 2008-05-19 2009-12-03 Seiko Epson Corp 半導体装置の製造方法
JP2009283492A (ja) * 2008-05-19 2009-12-03 Seiko Epson Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US6057241A (en) 2000-05-02
TW418492B (en) 2001-01-11
KR19980081825A (ko) 1998-11-25

Similar Documents

Publication Publication Date Title
JPH10303289A (ja) 半導体集積回路装置の製造方法
US6242323B1 (en) Semiconductor device and process for producing the same
US6093611A (en) Oxide liner for high reliability with reduced encroachment of the source/drain region
US20030119276A1 (en) Semiconductor device and process for producing the same
JP3670969B2 (ja) Ｍｏｓデバイスの形成方法
JP3923214B2 (ja) 半導体装置のトレンチ素子分離方法
JP4750342B2 (ja) Ｍｏｓ−ｆｅｔおよびその製造方法、並びに半導体装置
TW200428579A (en) Manufacturing method of semiconductor device
JP2002118256A (ja) 溝を有する半導体装置およびその製造方法
US6100160A (en) Oxide etch barrier formed by nitridation
JP2003017555A (ja) 半導体集積回路装置およびその製造方法
JPH11145273A (ja) 半導体装置の製造方法
JP2802600B2 (ja) 半導体装置の製造方法
JP2000133700A (ja) 半導体装置およびその製造方法
US20050121704A1 (en) Semiconductor device and method of manufacturing the same
CN100474558C (zh) 半导体器件的制造工艺
JPS60241267A (ja) 半導体装置の製造方法
JPH0334541A (ja) 半導体装置の製造方法
US20030181014A1 (en) Method of manufacturing semiconductor device with STI
CN1233851A (zh) 沟槽隔离的形成方法
JP3455742B2 (ja) 半導体装置
JP2000306991A (ja) 半導体装置の製造方法
US6133118A (en) Edge polysilicon buffer LOCOS isolation
JP2763105B2 (ja) 半導体装置の製造方法
JP2000315791A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040303

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040303

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20050315

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080122

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080324

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090331

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090721