JPH08330434A5 - - Google Patents

Info

Publication number
JPH08330434A5
JPH08330434A5 JP1995220877A JP22087795A JPH08330434A5 JP H08330434 A5 JPH08330434 A5 JP H08330434A5 JP 1995220877 A JP1995220877 A JP 1995220877A JP 22087795 A JP22087795 A JP 22087795A JP H08330434 A5 JPH08330434 A5 JP H08330434A5
Authority
JP
Japan
Prior art keywords
functional circuit
feed
wiring
region
circuit blocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1995220877A
Other languages
English (en)
Japanese (ja)
Other versions
JPH08330434A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP7220877A priority Critical patent/JPH08330434A/ja
Priority claimed from JP7220877A external-priority patent/JPH08330434A/ja
Publication of JPH08330434A publication Critical patent/JPH08330434A/ja
Priority to US08/868,046 priority patent/US5880493A/en
Priority to US09/241,079 priority patent/US6100550A/en
Publication of JPH08330434A5 publication Critical patent/JPH08330434A5/ja
Pending legal-status Critical Current

Links

JP7220877A 1994-12-09 1995-08-29 半導体集積回路装置およびその配置配線方法並びにレイアウト方法 Pending JPH08330434A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP7220877A JPH08330434A (ja) 1994-12-09 1995-08-29 半導体集積回路装置およびその配置配線方法並びにレイアウト方法
US08/868,046 US5880493A (en) 1994-12-09 1997-06-03 Semiconductor integrated circuit devices adapted for automatic design and method of arranging such devices
US09/241,079 US6100550A (en) 1994-12-09 1999-02-01 Circuit cell based semiconductor integrated circuit device and method of arrangement-interconnection therefor

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP6-306409 1994-12-09
JP30640994 1994-12-09
JP7-71930 1995-03-29
JP7193095 1995-03-29
JP7220877A JPH08330434A (ja) 1994-12-09 1995-08-29 半導体集積回路装置およびその配置配線方法並びにレイアウト方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2005240178A Division JP2006032981A (ja) 1994-12-09 2005-08-22 半導体集積回路装置およびその配置配線方法

Publications (2)

Publication Number Publication Date
JPH08330434A JPH08330434A (ja) 1996-12-13
JPH08330434A5 true JPH08330434A5 (enExample) 2005-11-04

Family

ID=27300809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7220877A Pending JPH08330434A (ja) 1994-12-09 1995-08-29 半導体集積回路装置およびその配置配線方法並びにレイアウト方法

Country Status (2)

Country Link
US (2) US5880493A (enExample)
JP (1) JPH08330434A (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000077609A (ja) * 1998-08-28 2000-03-14 Hitachi Ltd 半導体集積回路装置
JP3349989B2 (ja) * 1999-06-18 2002-11-25 エヌイーシーマイクロシステム株式会社 半導体集積回路装置及びそのレイアウト方法及び装置
JP4008629B2 (ja) * 1999-09-10 2007-11-14 株式会社東芝 半導体装置、その設計方法、及びその設計プログラムを格納したコンピュータ読み取り可能な記録媒体
US6528735B1 (en) 2001-09-07 2003-03-04 International Business Machines Corporation Substrate design of a chip using a generic substrate design
US7698681B2 (en) * 2007-08-14 2010-04-13 International Business Machines Corporation Method for radiation tolerance by logic book folding
US7725870B2 (en) * 2007-08-14 2010-05-25 International Business Machines Corporation Method for radiation tolerance by implant well notching
JP5741234B2 (ja) * 2011-06-10 2015-07-01 富士通株式会社 セルの配置構造、半導体集積回路、及び回路素子セルの配置方法
JP5708330B2 (ja) * 2011-07-15 2015-04-30 富士通セミコンダクター株式会社 配線パターンデータの生成方法
JP7065007B2 (ja) * 2018-10-01 2022-05-11 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197747A (ja) * 1982-05-14 1983-11-17 Hitachi Ltd マスタスライスｌｓｉ
JPS58200570A (ja) * 1982-05-19 1983-11-22 Hitachi Ltd 半導体集積回路装置
EP0154346B1 (en) * 1984-03-08 1991-09-18 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
JPH0644593B2 (ja) * 1984-11-09 1994-06-08 株式会社東芝 半導体集積回路装置
JPS61240652A (ja) * 1985-04-18 1986-10-25 Toshiba Corp 半導体集積回路装置
JP2606845B2 (ja) * 1987-06-19 1997-05-07 富士通株式会社 半導体集積回路
JP2529342B2 (ja) * 1988-03-14 1996-08-28 富士通株式会社 チャネル配線方法
JP2580301B2 (ja) * 1988-12-27 1997-02-12 株式会社日立製作所 半導体集積回路装置
JPH03255665A (ja) * 1990-03-06 1991-11-14 Nissan Motor Co Ltd 半導体集積回路装置
EP0466463A1 (en) * 1990-07-10 1992-01-15 Kawasaki Steel Corporation Basic cell and arrangement structure thereof
JPH04340252A (ja) * 1990-07-27 1992-11-26 Mitsubishi Electric Corp 半導体集積回路装置及びセルの配置配線方法
JP2894814B2 (ja) * 1990-09-28 1999-05-24 株式会社東芝 スタンダード・セル方式の半導体集積回路
JP3061928B2 (ja) * 1992-03-30 2000-07-10 日本電気株式会社 半導体装置
US5384472A (en) * 1992-06-10 1995-01-24 Aspec Technology, Inc. Symmetrical multi-layer metal logic array with continuous substrate taps and extension portions for increased gate density
US5452245A (en) * 1993-09-07 1995-09-19 Motorola, Inc. Memory efficient gate array cell
US5416431A (en) * 1994-03-21 1995-05-16 At&T Corp. Integrated circuit clock driver having improved layout

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