JPH04368691A - 半導体装置のバックバイアスレベル感知回路 - Google Patents

半導体装置のバックバイアスレベル感知回路

Info

Publication number
JPH04368691A
JPH04368691A JP4033906A JP3390692A JPH04368691A JP H04368691 A JPH04368691 A JP H04368691A JP 4033906 A JP4033906 A JP 4033906A JP 3390692 A JP3390692 A JP 3390692A JP H04368691 A JPH04368691 A JP H04368691A
Authority
JP
Japan
Prior art keywords
back bias
voltage
circuit
bias level
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4033906A
Other languages
English (en)
Japanese (ja)
Inventor
Young-Taek Lee
ヨウン−タエク　リー
Kim Kyoung-Ho
キョウン−ホ　キム
Jin-Man Han
ジン−マン　ハン
Hong-Seon Hwang
ホン−セオン　ホワン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1019910009999A external-priority patent/KR930001236A/ko
Priority claimed from KR1019910009997A external-priority patent/KR940008150B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH04368691A publication Critical patent/JPH04368691A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316—Testing of analog circuits
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP4033906A 1991-06-17 1992-02-21 半導体装置のバックバイアスレベル感知回路 Pending JPH04368691A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1019910009999A KR930001236A (ko) 1991-06-17 1991-06-17 전원전압 변동에 둔감한 특성을 갖는 기판 전압 레벨 감지회로
KR1019910009997A KR940008150B1 (ko) 1991-06-17 1991-06-17 반도체 메모리 장치의 백바이어스레벨 감지회로
KR9999/1991 1991-06-17
KR9997/1991 1991-06-17

Publications (1)

Publication Number Publication Date
JPH04368691A true JPH04368691A (ja) 1992-12-21

Family

ID=26628647

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4033906A Pending JPH04368691A (ja) 1991-06-17 1992-02-21 半導体装置のバックバイアスレベル感知回路

Country Status (7)

Country Link
JP (1) JPH04368691A (fr)
CN (1) CN1067773A (fr)
DE (1) DE4135148C2 (fr)
FR (1) FR2677771A1 (fr)
GB (1) GB2256950A (fr)
IT (1) IT1251721B (fr)
NL (1) NL9101710A (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5337284A (en) * 1993-01-11 1994-08-09 United Memories, Inc. High voltage generator having a self-timed clock circuit and charge pump, and a method therefor
KR0123849B1 (ko) * 1994-04-08 1997-11-25 문정환 반도체 디바이스의 내부 전압발생기
KR0127318B1 (ko) * 1994-04-13 1998-04-02 문정환 백바이어스전압 발생기
US6795359B1 (en) * 2003-06-10 2004-09-21 Micron Technology, Inc. Methods and apparatus for measuring current as in sensing a memory cell
TWI651929B (zh) * 2018-05-02 2019-02-21 友達光電股份有限公司 感測電路

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0262071A (ja) * 1988-08-26 1990-03-01 Mitsubishi Electric Corp 半導体装置
JPH0323659A (ja) * 1989-06-21 1991-01-31 Nec Corp 基板電位設定回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4229667A (en) * 1978-08-23 1980-10-21 Rockwell International Corporation Voltage boosting substrate bias generator
JPS5694654A (en) * 1979-12-27 1981-07-31 Toshiba Corp Generating circuit for substrate bias voltage
US4739191A (en) * 1981-04-27 1988-04-19 Signetics Corporation Depletion-mode FET for the regulation of the on-chip generated substrate bias voltage
JPS57199335A (en) * 1981-06-02 1982-12-07 Toshiba Corp Generating circuit for substrate bias
US4547682A (en) * 1983-10-27 1985-10-15 International Business Machines Corporation Precision regulation, frequency modulated substrate voltage generator
US4581546A (en) * 1983-11-02 1986-04-08 Inmos Corporation CMOS substrate bias generator having only P channel transistors in the charge pump
IT1220982B (it) * 1983-11-30 1990-06-21 Ates Componenti Elettron Circuito regolatore della tensione di polarizzazione del substrato di un circuito integrato a transistori a effetto di campo
JP2501590B2 (ja) * 1987-07-29 1996-05-29 沖電気工業株式会社 半導体装置の駆動回路
JPH0783254B2 (ja) * 1989-03-22 1995-09-06 株式会社東芝 半導体集積回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0262071A (ja) * 1988-08-26 1990-03-01 Mitsubishi Electric Corp 半導体装置
JPH0323659A (ja) * 1989-06-21 1991-01-31 Nec Corp 基板電位設定回路

Also Published As

Publication number Publication date
GB9124294D0 (en) 1992-01-08
ITMI912939A1 (it) 1993-05-06
FR2677771A1 (fr) 1992-12-18
CN1067773A (zh) 1993-01-06
DE4135148C2 (de) 1995-02-02
NL9101710A (nl) 1993-01-18
GB2256950A (en) 1992-12-23
IT1251721B (it) 1995-05-22
ITMI912939A0 (it) 1991-11-06
DE4135148A1 (de) 1992-12-24

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