JP7407498B2 - 配線回路基板およびその製造方法 - Google Patents

配線回路基板およびその製造方法 Download PDF

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Publication number
JP7407498B2
JP7407498B2 JP2017177786A JP2017177786A JP7407498B2 JP 7407498 B2 JP7407498 B2 JP 7407498B2 JP 2017177786 A JP2017177786 A JP 2017177786A JP 2017177786 A JP2017177786 A JP 2017177786A JP 7407498 B2 JP7407498 B2 JP 7407498B2
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JP
Japan
Prior art keywords
layer
insulating layer
shield
main body
thickness
Prior art date
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Active
Application number
JP2017177786A
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English (en)
Japanese (ja)
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JP2019054130A5 (enExample
JP2019054130A (ja
Inventor
良広 河邨
周作 柴田
隼人 高倉
正樹 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nitto Denko Corp
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Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Priority to JP2017177786A priority Critical patent/JP7407498B2/ja
Priority to PCT/JP2018/032849 priority patent/WO2019054246A1/ja
Priority to US16/644,781 priority patent/US11297711B2/en
Priority to CN201880059596.9A priority patent/CN111096087B/zh
Priority to TW107132161A priority patent/TWI786184B/zh
Publication of JP2019054130A publication Critical patent/JP2019054130A/ja
Publication of JP2019054130A5 publication Critical patent/JP2019054130A5/ja
Application granted granted Critical
Publication of JP7407498B2 publication Critical patent/JP7407498B2/ja
Active legal-status Critical Current
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/032—Organic insulating material consisting of one material
    • H05K1/0346—Organic insulating material consisting of one material containing N
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07—Electric details
    • H05K2201/0707—Shielding
    • H05K2201/0715—Shielding provided by an outer layer of PCB

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
JP2017177786A 2017-09-15 2017-09-15 配線回路基板およびその製造方法 Active JP7407498B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2017177786A JP7407498B2 (ja) 2017-09-15 2017-09-15 配線回路基板およびその製造方法
PCT/JP2018/032849 WO2019054246A1 (ja) 2017-09-15 2018-09-05 配線回路基板およびその製造方法
US16/644,781 US11297711B2 (en) 2017-09-15 2018-09-05 Wiring circuit board and producing method thereof
CN201880059596.9A CN111096087B (zh) 2017-09-15 2018-09-05 布线电路基板及其制造方法
TW107132161A TWI786184B (zh) 2017-09-15 2018-09-13 配線電路基板及其製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2017177786A JP7407498B2 (ja) 2017-09-15 2017-09-15 配線回路基板およびその製造方法

Publications (3)

Publication Number Publication Date
JP2019054130A JP2019054130A (ja) 2019-04-04
JP2019054130A5 JP2019054130A5 (enExample) 2019-12-05
JP7407498B2 true JP7407498B2 (ja) 2024-01-04

Family

ID=65723582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017177786A Active JP7407498B2 (ja) 2017-09-15 2017-09-15 配線回路基板およびその製造方法

Country Status (5)

Country Link
US (1) US11297711B2 (enExample)
JP (1) JP7407498B2 (enExample)
CN (1) CN111096087B (enExample)
TW (1) TWI786184B (enExample)
WO (1) WO2019054246A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7424802B2 (ja) * 2019-11-12 2024-01-30 日東電工株式会社 配線回路基板およびその製造方法
US20230014046A1 (en) * 2021-07-13 2023-01-19 Mediatek Inc. Semiconductor devices with in-package PGS for coupling noise suppression
US20230076844A1 (en) * 2021-09-09 2023-03-09 Qualcomm Incorporated Semiconductor die module packages with void-defined sections in a metal structure(s) in a package substrate to reduce die-substrate mechanical stress, and related methods

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006135020A (ja) 2004-11-04 2006-05-25 Kitagawa Ind Co Ltd 電磁波シールドフィルム
JP2006339661A (ja) 2006-06-13 2006-12-14 Kaneka Corp 多層ボンディングシート及びフレキシブル両面金属張積層板の製造方法
JP2009278048A (ja) 2008-05-19 2009-11-26 Kyocera Chemical Corp シールド被覆フレキシブルプリント配線板の製造方法
JP2017145344A (ja) 2016-02-18 2017-08-24 新日鉄住金化学株式会社 ポリイミド、ポリイミド溶液、樹脂フィルム、ポリイミド組成物、架橋ポリイミド、カバーレイフィルム及び回路基板

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04165696A (ja) * 1990-10-30 1992-06-11 Fujitsu Ltd 薄膜多層基板の製造方法
TW448524B (en) * 1997-01-17 2001-08-01 Seiko Epson Corp Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
JP3702646B2 (ja) * 1998-05-20 2005-10-05 富士通株式会社 回路基板の製造方法
JP3756041B2 (ja) * 1999-05-27 2006-03-15 Ｈｏｙａ株式会社 多層プリント配線板の製造方法
JP4369684B2 (ja) * 2003-05-26 2009-11-25 大日本印刷株式会社 多層配線基板およびその製造方法
JP4790558B2 (ja) 2006-10-02 2011-10-12 日東電工株式会社 配線回路基板の製造方法
JP2008192978A (ja) * 2007-02-07 2008-08-21 Shinko Electric Ind Co Ltd 半導体装置の製造方法
JP2009295850A (ja) * 2008-06-06 2009-12-17 Hitachi Chem Co Ltd 多層回路基板の製造方法及びこれから得られる多層回路基板、半導体チップ搭載基板並びにこの基板を用いた半導体パッケージ
JP2011103414A (ja) * 2009-11-12 2011-05-26 Toray Advanced Film Co Ltd 金属パターン積層基材の製造方法。
CN102959948A (zh) * 2011-04-05 2013-03-06 松下电器产业株式会社 固态成像装置和固态成像装置的制造方法
JP5829100B2 (ja) 2011-10-27 2015-12-09 日東電工株式会社 配線回路基板
JP6030394B2 (ja) * 2012-09-26 2016-11-24 住友電工プリントサーキット株式会社 プリント配線板
JP6418605B2 (ja) * 2015-07-31 2018-11-07 東芝メモリ株式会社 半導体装置および半導体装置の製造方法
JP5975364B2 (ja) 2015-08-10 2016-08-23 大日本印刷株式会社 サスペンション用基板の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006135020A (ja) 2004-11-04 2006-05-25 Kitagawa Ind Co Ltd 電磁波シールドフィルム
JP2006339661A (ja) 2006-06-13 2006-12-14 Kaneka Corp 多層ボンディングシート及びフレキシブル両面金属張積層板の製造方法
JP2009278048A (ja) 2008-05-19 2009-11-26 Kyocera Chemical Corp シールド被覆フレキシブルプリント配線板の製造方法
JP2017145344A (ja) 2016-02-18 2017-08-24 新日鉄住金化学株式会社 ポリイミド、ポリイミド溶液、樹脂フィルム、ポリイミド組成物、架橋ポリイミド、カバーレイフィルム及び回路基板

Also Published As

Publication number Publication date
US20210084750A1 (en) 2021-03-18
WO2019054246A1 (ja) 2019-03-21
US11297711B2 (en) 2022-04-05
CN111096087B (zh) 2023-11-24
JP2019054130A (ja) 2019-04-04
TWI786184B (zh) 2022-12-11
CN111096087A (zh) 2020-05-01
TW201933954A (zh) 2019-08-16

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