JP6801154B2 - シリコンオンインシュレータウェハの埋め込み酸化膜を溶解するための方法 - Google Patents
シリコンオンインシュレータウェハの埋め込み酸化膜を溶解するための方法 Download PDFInfo
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- JP6801154B2 JP6801154B2 JP2019518498A JP2019518498A JP6801154B2 JP 6801154 B2 JP6801154 B2 JP 6801154B2 JP 2019518498 A JP2019518498 A JP 2019518498A JP 2019518498 A JP2019518498 A JP 2019518498A JP 6801154 B2 JP6801154 B2 JP 6801154B2
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- 235000012431 wafers Nutrition 0.000 title claims description 77
- 238000000034 method Methods 0.000 title claims description 69
- 239000012212 insulator Substances 0.000 title claims description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 131
- 239000001301 oxygen Substances 0.000 claims description 131
- 229910052760 oxygen Inorganic materials 0.000 claims description 131
- 230000002000 scavenging effect Effects 0.000 claims description 93
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 75
- 229910052710 silicon Inorganic materials 0.000 claims description 75
- 239000010703 silicon Substances 0.000 claims description 75
- 238000000137 annealing Methods 0.000 claims description 43
- 238000009792 diffusion process Methods 0.000 claims description 40
- 230000004888 barrier function Effects 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 238000012546 transfer Methods 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 3
- 229910052747 lanthanoid Inorganic materials 0.000 claims description 3
- 150000002602 lanthanoids Chemical class 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 2
- 229910052761 rare earth metal Inorganic materials 0.000 claims description 2
- 150000002910 rare earth metals Chemical class 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 238000004090 dissolution Methods 0.000 description 29
- 238000002844 melting Methods 0.000 description 23
- 230000008018 melting Effects 0.000 description 23
- 238000011978 dissolution method Methods 0.000 description 18
- 238000000151 deposition Methods 0.000 description 15
- 230000008901 benefit Effects 0.000 description 13
- 230000008569 process Effects 0.000 description 10
- 238000010561 standard procedure Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000010309 melting process Methods 0.000 description 2
- 238000004064 recycling Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000009089 cytolysis Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052746 lanthanum Inorganic materials 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
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- Formation Of Insulating Films (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
Claims (11)
- シリコンオンインシュレータウェハの埋め込み酸化膜を溶解するための方法であって、
埋め込み酸化膜層(102、302、402、502)を介してキャリア基板(103、303、403、503)に張り付けられたシリコン層(101、301、401、501)を有するシリコンオンインシュレータウェハ(100、300、400、500)を用意するステップと、
前記シリコンオンインシュレータウェハ(100、300、400、500)をアニールして、前記埋め込み酸化膜層(102、302、402、502)を少なくとも部分的に溶解するステップと、
を含む方法において、
前記アニールステップの前に、前記シリコン層(101、301、401、501)上に又は前記シリコン層(101、301、401、501)を覆って酸素スカベンジング層(104、304、404、504)を設けるステップをさらに含むことを特徴とする、方法。 - 前記シリコン層(101、301、401、501)が、約150nm以下の厚さ(hSi)を有する、請求項1に記載の方法。
- 前記シリコン層(101、301、401、501)が、歪み層である、請求項1又は2に記載の方法。
- 前記酸素スカベンジング層(104、304、404、504)が、溶解すべき前記埋め込み酸化膜層(102、302、402、502)の少なくとも所定の厚さを溶解するために適合した厚さ(hscav)を有する、請求項1〜3のいずれか一項に記載の方法。
- 前記酸素スカベンジング層(104、304、404、504)が、HfO2の化学量論よりも過剰な所定の量のHfをもった準化学量論的HfO2を含む、すなわちx<2であるHfOxである、請求項1〜4のいずれか一項に記載の方法。
- 前記酸素スカベンジング層(104、304、404、504)が、ランタニド金属、希土類金属、チタンリッチ(Tiリッチ)の窒化チタン(TiN)、2族元素、及び3族元素のうちの少なくとも1つからさらに選択される、請求項1〜5のいずれか一項に記載の方法。
- アニールする前記ステップの前に、前記酸素スカベンジング層(404)の最上部に及び/又は前記酸素スカベンジング層(504)と前記シリコン層(501)との間に拡散バリア層(405、505)を設けるステップをさらに含む、請求項1〜6のいずれか一項に記載の方法。
- 前記拡散バリア層(405)が前記酸素スカベンジング層(404)の最上部に設けられるときに、前記拡散バリア層(405)が酸素拡散バリア層である、請求項7に記載の方法。
- 前記拡散バリア層(505)が前記酸素スカベンジング層(504)と前記シリコン層(501)との間に設けられるときに、前記拡散バリア層(505)が、前記シリコン層(501)中への酸素スカベンジング元素の拡散を防止するように選択される、請求項7又は8に記載の方法。
- アニールする前記ステップが、標準的な炉内で実行される、請求項1〜9のいずれか一項に記載の方法。
- 前記シリコンオンインシュレータウェハ(100、300、400、500)を用意する前記ステップが、イオン注入による層移転技術を使用して前記キャリア基板(103、303、403、503)上へと前記シリコンの層(101、301、401、501)を移転するステップを含む、請求項1〜10のいずれか一項に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1659917 | 2016-10-13 | ||
FR1659917A FR3057705B1 (fr) | 2016-10-13 | 2016-10-13 | Procede de dissolution d'un oxyde enterre dans une plaquette de silicium sur isolant |
PCT/EP2017/074823 WO2018069067A1 (en) | 2016-10-13 | 2017-09-29 | Method for dissolving a buried oxide in a silicon-on-insulator wafer |
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JP2019535144A JP2019535144A (ja) | 2019-12-05 |
JP6801154B2 true JP6801154B2 (ja) | 2020-12-16 |
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JP2019518498A Active JP6801154B2 (ja) | 2016-10-13 | 2017-09-29 | シリコンオンインシュレータウェハの埋め込み酸化膜を溶解するための方法 |
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US (1) | US10847370B2 (ja) |
JP (1) | JP6801154B2 (ja) |
KR (1) | KR102217707B1 (ja) |
CN (1) | CN109844911B (ja) |
DE (1) | DE112017005180T5 (ja) |
FR (1) | FR3057705B1 (ja) |
SG (1) | SG11201903019XA (ja) |
TW (1) | TWI641040B (ja) |
WO (1) | WO2018069067A1 (ja) |
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US11069560B2 (en) * | 2016-11-01 | 2021-07-20 | Shin-Etsu Chemical Co., Ltd. | Method of transferring device layer to transfer substrate and highly thermal conductive substrate |
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JP2003078116A (ja) * | 2001-08-31 | 2003-03-14 | Canon Inc | 半導体部材の製造方法及び半導体装置の製造方法 |
US6784072B2 (en) * | 2002-07-22 | 2004-08-31 | International Business Machines Corporation | Control of buried oxide in SIMOX |
US6664598B1 (en) * | 2002-09-05 | 2003-12-16 | International Business Machines Corporation | Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control |
US20050170570A1 (en) * | 2004-01-30 | 2005-08-04 | International Business Machines Corporation | High electrical quality buried oxide in simox |
US8138061B2 (en) * | 2005-01-07 | 2012-03-20 | International Business Machines Corporation | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide |
US7867906B2 (en) * | 2005-06-22 | 2011-01-11 | Nec Corporation | Semiconductor device and method for manufacturing same |
JP2007180416A (ja) * | 2005-12-28 | 2007-07-12 | Siltronic Ag | Soiウェーハの製造方法 |
FR2936356B1 (fr) * | 2008-09-23 | 2010-10-22 | Soitec Silicon On Insulator | Procede de dissolution locale de la couche d'oxyde dans une structure de type semi-conducteur sur isolant |
FR2937794A1 (fr) * | 2008-10-28 | 2010-04-30 | Soitec Silicon On Insulator | Procede de traitement d'une structure de type semi-conducteur sur isolant par dissolution selective de sa couche d'oxyde |
FR2938118B1 (fr) * | 2008-10-30 | 2011-04-22 | Soitec Silicon On Insulator | Procede de fabrication d'un empilement de couches minces semi-conductrices |
FR2941324B1 (fr) * | 2009-01-22 | 2011-04-29 | Soitec Silicon On Insulator | Procede de dissolution de la couche d'oxyde dans la couronne d'une structure de type semi-conducteur sur isolant. |
US20100244206A1 (en) | 2009-03-31 | 2010-09-30 | International Business Machines Corporation | Method and structure for threshold voltage control and drive current improvement for high-k metal gate transistors |
EP2381470B1 (en) * | 2010-04-22 | 2012-08-22 | Soitec | Semiconductor device comprising a field-effect transistor in a silicon-on-insulator structure |
US8796116B2 (en) * | 2011-01-31 | 2014-08-05 | Sunedison Semiconductor Limited | Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods |
JP2012204501A (ja) * | 2011-03-24 | 2012-10-22 | Sony Corp | 半導体装置、電子デバイス、及び、半導体装置の製造方法 |
FR2980916B1 (fr) * | 2011-10-03 | 2014-03-28 | Soitec Silicon On Insulator | Procede de fabrication d'une structure de type silicium sur isolant |
US8637381B2 (en) * | 2011-10-17 | 2014-01-28 | International Business Machines Corporation | High-k dielectric and silicon nitride box region |
JP2013157586A (ja) | 2012-01-27 | 2013-08-15 | Mtec:Kk | 化合物半導体 |
US8633118B2 (en) | 2012-02-01 | 2014-01-21 | Tokyo Electron Limited | Method of forming thin metal and semi-metal layers by thermal remote oxygen scavenging |
FR3003684B1 (fr) * | 2013-03-25 | 2015-03-27 | Soitec Silicon On Insulator | Procede de dissolution d'une couche de dioxyde de silicium. |
KR102336517B1 (ko) | 2015-09-24 | 2021-12-07 | 에스케이텔레콤 주식회사 | 심볼 입력 방법 및 그 장치 |
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- 2017-09-29 CN CN201780063006.5A patent/CN109844911B/zh active Active
- 2017-09-29 DE DE112017005180.0T patent/DE112017005180T5/de active Pending
- 2017-09-29 JP JP2019518498A patent/JP6801154B2/ja active Active
- 2017-09-29 US US16/342,133 patent/US10847370B2/en active Active
- 2017-09-29 KR KR1020197011145A patent/KR102217707B1/ko active IP Right Grant
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US20190259617A1 (en) | 2019-08-22 |
KR20190047083A (ko) | 2019-05-07 |
KR102217707B1 (ko) | 2021-02-19 |
CN109844911A (zh) | 2019-06-04 |
US10847370B2 (en) | 2020-11-24 |
FR3057705B1 (fr) | 2019-04-12 |
TWI641040B (zh) | 2018-11-11 |
JP2019535144A (ja) | 2019-12-05 |
SG11201903019XA (en) | 2019-05-30 |
WO2018069067A1 (en) | 2018-04-19 |
FR3057705A1 (fr) | 2018-04-20 |
CN109844911B (zh) | 2023-03-24 |
DE112017005180T5 (de) | 2019-07-04 |
TW201814785A (zh) | 2018-04-16 |
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