JP6165127B2 - 半導体装置及び半導体装置の製造方法 - Google Patents

半導体装置及び半導体装置の製造方法 Download PDF

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Publication number
JP6165127B2
JP6165127B2 JP2014259115A JP2014259115A JP6165127B2 JP 6165127 B2 JP6165127 B2 JP 6165127B2 JP 2014259115 A JP2014259115 A JP 2014259115A JP 2014259115 A JP2014259115 A JP 2014259115A JP 6165127 B2 JP6165127 B2 JP 6165127B2
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Japan
Prior art keywords
bonding
intermediate layer
wafer
substrates
semiconductor device
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JP2014259115A
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English (en)
Japanese (ja)
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JP2016119415A (ja
JP2016119415A5 (enExample
Inventor
淳 内海
淳 内海
後藤 崇之
崇之 後藤
毅典 鈴木
毅典 鈴木
健介 井手
健介 井手
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Mitsubishi Heavy Industries Machine Tool Co Ltd
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Mitsubishi Heavy Industries Machine Tool Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to JP2014259115A priority Critical patent/JP6165127B2/ja
Application filed by Mitsubishi Heavy Industries Machine Tool Co Ltd filed Critical Mitsubishi Heavy Industries Machine Tool Co Ltd
Priority to CN201580069954.0A priority patent/CN107112199B/zh
Priority to US15/537,646 priority patent/US10486263B2/en
Priority to PCT/JP2015/078518 priority patent/WO2016103846A1/ja
Priority to KR1020177017033A priority patent/KR101994011B1/ko
Priority to EP15872415.3A priority patent/EP3240015B1/en
Priority to TW104143236A priority patent/TWI596651B/zh
Publication of JP2016119415A publication Critical patent/JP2016119415A/ja
Publication of JP2016119415A5 publication Critical patent/JP2016119415A5/ja
Application granted granted Critical
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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/02Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating by means of a press ; Diffusion bonding
    • H10P10/12
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/22Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating taking account of the properties of the materials to be welded
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C3/00Assembling of devices or systems from individually processed components
    • B81C3/001Bonding of two components
    • H10P10/128
    • H10P72/0428
    • H10P90/1914
    • H10P95/00
    • H10P95/90
    • H10W70/635
    • H10W72/30
    • H10W90/401
    • H10W72/941
    • H10W72/9415
    • H10W80/312

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Manufacturing & Machinery (AREA)
JP2014259115A 2014-12-22 2014-12-22 半導体装置及び半導体装置の製造方法 Active JP6165127B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2014259115A JP6165127B2 (ja) 2014-12-22 2014-12-22 半導体装置及び半導体装置の製造方法
US15/537,646 US10486263B2 (en) 2014-12-22 2015-10-07 Room-temperature-bonded semiconductor device and manufacturing method of room-temperature-bonded semiconductor device
PCT/JP2015/078518 WO2016103846A1 (ja) 2014-12-22 2015-10-07 半導体装置及び半導体装置の製造方法
KR1020177017033A KR101994011B1 (ko) 2014-12-22 2015-10-07 반도체 장치 및 반도체 장치의 제조 방법
CN201580069954.0A CN107112199B (zh) 2014-12-22 2015-10-07 半导体装置及半导体装置的制造方法
EP15872415.3A EP3240015B1 (en) 2014-12-22 2015-10-07 Semiconductor device and semiconductor device manufacturing method
TW104143236A TWI596651B (zh) 2014-12-22 2015-12-22 Semiconductor device and method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014259115A JP6165127B2 (ja) 2014-12-22 2014-12-22 半導体装置及び半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2016119415A JP2016119415A (ja) 2016-06-30
JP2016119415A5 JP2016119415A5 (enExample) 2016-09-08
JP6165127B2 true JP6165127B2 (ja) 2017-07-19

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JP2014259115A Active JP6165127B2 (ja) 2014-12-22 2014-12-22 半導体装置及び半導体装置の製造方法

Country Status (7)

Country Link
US (1) US10486263B2 (enExample)
EP (1) EP3240015B1 (enExample)
JP (1) JP6165127B2 (enExample)
KR (1) KR101994011B1 (enExample)
CN (1) CN107112199B (enExample)
TW (1) TWI596651B (enExample)
WO (1) WO2016103846A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240004346A (ko) 2021-04-28 2024-01-11 니덱 머신 툴 가부시키가이샤 반도체 장치의 제조 방법 및 상온 접합 장치

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
TWI822659B (zh) 2016-10-27 2023-11-21 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
US10515913B2 (en) 2017-03-17 2019-12-24 Invensas Bonding Technologies, Inc. Multi-metal contact structure
US10446441B2 (en) 2017-06-05 2019-10-15 Invensas Corporation Flat metal features for microelectronics applications
US11244916B2 (en) 2018-04-11 2022-02-08 Invensas Bonding Technologies, Inc. Low temperature bonded structures
US10790262B2 (en) 2018-04-11 2020-09-29 Invensas Bonding Technologies, Inc. Low temperature bonded structures
US11244920B2 (en) 2018-12-18 2022-02-08 Invensas Bonding Technologies, Inc. Method and structures for low temperature device bonding
CN111370339B (zh) * 2020-03-20 2022-02-22 中国科学院半导体研究所 晶圆的室温等静压金属键合方法
US11735523B2 (en) 2020-05-19 2023-08-22 Adeia Semiconductor Bonding Technologies Inc. Laterally unconfined structure
CN116848631A (zh) 2020-12-30 2023-10-03 美商艾德亚半导体接合科技有限公司 具有导电特征的结构及其形成方法
JP2024513304A (ja) * 2021-03-03 2024-03-25 アデイア セミコンダクター ボンディング テクノロジーズ インコーポレイテッド 直接接合のためのコンタクト構造
JP2023137581A (ja) * 2022-03-18 2023-09-29 キオクシア株式会社 半導体装置、半導体装置の製造方法
FR3134227A1 (fr) * 2022-04-04 2023-10-06 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procédé de collage d’un premier substrat au niveau d’une surface présentant une nanotopologie élastique
US12512425B2 (en) 2022-04-25 2025-12-30 Adeia Semiconductor Bonding Technologies Inc. Expansion controlled structure for direct bonding and method of forming same
CN114999948A (zh) * 2022-06-06 2022-09-02 闽南师范大学 一种高真空磁控溅射热压键合一体机以及键合方法
US12506114B2 (en) 2022-12-29 2025-12-23 Adeia Semiconductor Bonding Technologies Inc. Directly bonded metal structures having aluminum features and methods of preparing same
CN116092953B (zh) * 2023-03-07 2023-07-18 天津中科晶禾电子科技有限责任公司 一种晶圆键合装置、方法及复合衬底组件
JP7526450B1 (ja) * 2024-03-22 2024-08-01 エスエイチダブリュウテクノロジーズ(シャンハイ)ユウゲンコウシ 半導体ウエーハの接合装置及び接合方法
EP4651180A1 (en) * 2024-03-29 2025-11-19 Daikin Industries, Ltd. Method for producing laminate, and laminate

Family Cites Families (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2642645B2 (ja) * 1987-11-19 1997-08-20 株式会社日立製作所 半導体基板の製造方法及び半導体装置の製造方法
JPH0684733A (ja) * 1992-09-03 1994-03-25 Hitachi Ltd 半導体集積回路装置とその製造方法及び半導体集積回路製造装置
JP2791429B2 (ja) * 1996-09-18 1998-08-27 工業技術院長 シリコンウェハーの常温接合法
DE19648759A1 (de) * 1996-11-25 1998-05-28 Max Planck Gesellschaft Verfahren zur Herstellung von Mikrostrukturen sowie Mikrostruktur
JP3171322B2 (ja) * 1997-03-11 2001-05-28 日本電気株式会社 Soi基板およびその製造方法
FR2783969B1 (fr) * 1998-09-28 2002-01-18 Commissariat Energie Atomique Dispositif hybride et procede de realisation de composants electriquement actifs par assemblage
US6387736B1 (en) * 1999-04-26 2002-05-14 Agilent Technologies, Inc. Method and structure for bonding layers in a semiconductor device
JP4275806B2 (ja) * 1999-06-01 2009-06-10 株式会社ルネサステクノロジ 半導体素子の実装方法
FR2798224B1 (fr) * 1999-09-08 2003-08-29 Commissariat Energie Atomique Realisation d'un collage electriquement conducteur entre deux elements semi-conducteurs.
JP3440057B2 (ja) 2000-07-05 2003-08-25 唯知 須賀 半導体装置およびその製造方法
CN1656401A (zh) * 2002-05-28 2005-08-17 松下电工株式会社 光路-电路混载基板用材料以及光路-电路混载基板
US7114361B2 (en) * 2003-09-12 2006-10-03 Board Of Supervisors Of Louisiana State University And Agricultural And Mechanical College Microscale compression molding of metals with surface engineered LIGA inserts
FR2864336B1 (fr) * 2003-12-23 2006-04-28 Commissariat Energie Atomique Procede de scellement de deux plaques avec formation d'un contact ohmique entre celles-ci
JP3790995B2 (ja) * 2004-01-22 2006-06-28 有限会社ボンドテック 接合方法及びこの方法により作成されるデバイス並びに接合装置
EP1557449A1 (en) * 2004-01-22 2005-07-27 3M Innovative Properties Company Adhesive tape for structural bonding
FR2872625B1 (fr) * 2004-06-30 2006-09-22 Commissariat Energie Atomique Assemblage par adhesion moleculaire de deux substrats, l'un au moins supportant un film conducteur electrique
US7550366B2 (en) * 2005-12-02 2009-06-23 Ayumi Industry Method for bonding substrates and device for bonding substrates
US7345344B2 (en) * 2006-02-16 2008-03-18 Freescale Semiconductor, Inc. Embedded substrate interconnect for underside contact to source and drain regions
JP4162094B2 (ja) 2006-05-30 2008-10-08 三菱重工業株式会社 常温接合によるデバイス、デバイス製造方法ならびに常温接合装置
JP4172806B2 (ja) * 2006-09-06 2008-10-29 三菱重工業株式会社 常温接合方法及び常温接合装置
EP1993127B1 (en) * 2007-05-18 2013-04-24 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate
JP4967842B2 (ja) * 2007-06-18 2012-07-04 セイコーエプソン株式会社 シリコン基材の接合方法、液滴吐出ヘッド、液滴吐出装置および電子デバイス
CN104600057B (zh) * 2007-09-12 2018-11-02 斯莫特克有限公司 使用纳米结构连接和粘接相邻层
JP4786693B2 (ja) * 2008-09-30 2011-10-05 三菱重工業株式会社 ウェハ接合装置およびウェハ接合方法
JP5342210B2 (ja) * 2008-10-30 2013-11-13 三菱重工業株式会社 アライメント装置制御装置およびアライメント方法
JP4796120B2 (ja) * 2008-12-11 2011-10-19 三菱重工業株式会社 常温接合装置
JP5389627B2 (ja) * 2008-12-11 2014-01-15 信越化学工業株式会社 ワイドバンドギャップ半導体を積層した複合基板の製造方法
JP2010278337A (ja) * 2009-05-29 2010-12-09 Shin-Etsu Chemical Co Ltd 表面欠陥密度が少ないsos基板
US8507966B2 (en) * 2010-03-02 2013-08-13 Micron Technology, Inc. Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same
US9608119B2 (en) * 2010-03-02 2017-03-28 Micron Technology, Inc. Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures
US8647962B2 (en) * 2010-03-23 2014-02-11 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer level packaging bond
JP4831844B1 (ja) * 2010-09-28 2011-12-07 三菱重工業株式会社 常温接合装置および常温接合方法
US8563396B2 (en) * 2011-01-29 2013-10-22 International Business Machines Corporation 3D integration method using SOI substrates and structures produced thereby
EP2672507B1 (en) * 2011-01-31 2020-12-30 Tadatomo Suga Bonding-substrate fabrication method, bonding-substrate fabrication apparatus, and substrate assembly
WO2012105473A1 (ja) * 2011-01-31 2012-08-09 ボンドテック株式会社 接合基板作製方法、接合基板、基板接合方法、接合基板作製装置、及び基板接合体
JP5587826B2 (ja) * 2011-05-12 2014-09-10 日本電信電話株式会社 半導体装置
KR20130016682A (ko) * 2011-08-08 2013-02-18 에스케이하이닉스 주식회사 듀얼 레이어 구조의 반도체칩과 듀얼 레이어 구조의 반도체칩을 갖는 패키지들 및 그 제조방법
JP2013098186A (ja) * 2011-10-27 2013-05-20 Mitsubishi Heavy Ind Ltd 常温接合装置
WO2013187079A1 (ja) * 2012-06-15 2013-12-19 住友化学株式会社 複合基板の製造方法および複合基板
KR101755955B1 (ko) * 2012-06-15 2017-07-07 미쯔비시 케미컬 주식회사 적층체
WO2014017369A1 (ja) * 2012-07-25 2014-01-30 信越化学工業株式会社 ハイブリッド基板の製造方法及びハイブリッド基板
US8724060B2 (en) * 2012-08-02 2014-05-13 Shenzhen China Star Optoelectronics Technology Co., Ltd. Method for manufacturing liquid crystal display module with photovoltaic cell and liquid crystal display module manufactured with same
JP6037734B2 (ja) * 2012-09-07 2016-12-07 三菱重工工作機械株式会社 常温接合装置および常温接合方法
JP6065176B2 (ja) * 2012-09-27 2017-01-25 三菱重工工作機械株式会社 常温接合装置および常温接合方法
EP2907790B1 (en) * 2012-10-15 2019-05-08 Shin-Etsu Chemical Co., Ltd. Method for producing nanocarbon film and nanocarbon film
JP2014107393A (ja) * 2012-11-27 2014-06-09 Mitsubishi Heavy Ind Ltd 常温接合デバイス、常温接合デバイスを有するウェハおよび常温接合方法
US9446467B2 (en) * 2013-03-14 2016-09-20 Taiwan Semiconductor Manufacturing Company, Ltd. Integrate rinse module in hybrid bonding platform
US20150048509A1 (en) * 2013-08-16 2015-02-19 Globalfoundries Singapore Pte. Ltd. Cmos compatible wafer bonding layer and process
US9293303B2 (en) * 2013-08-30 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Low contamination chamber for surface activation
JP6330151B2 (ja) * 2013-09-17 2018-05-30 パナソニックIpマネジメント株式会社 半導体装置及びその製造方法
WO2015040798A1 (ja) * 2013-09-20 2015-03-26 パナソニックIpマネジメント株式会社 半導体装置及びその製造方法
WO2015046091A1 (ja) * 2013-09-27 2015-04-02 独立行政法人産業技術総合研究所 ステンレス鋼部材の接合方法およびステンレス鋼
JP2015115446A (ja) * 2013-12-11 2015-06-22 株式会社東芝 半導体装置の製造方法
US9437572B2 (en) * 2013-12-18 2016-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive pad structure for hybrid bonding and methods of forming same
JP6125443B2 (ja) * 2014-01-17 2017-05-10 三菱重工工作機械株式会社 常温接合装置
US9478471B2 (en) * 2014-02-19 2016-10-25 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for verification of bonding alignment
US9190345B1 (en) * 2014-03-28 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacture thereof
US9257414B2 (en) * 2014-04-10 2016-02-09 Taiwan Semiconductor Manufacturing Company, Ltd. Stacked semiconductor structure and method
US9455158B2 (en) * 2014-05-30 2016-09-27 Taiwan Semiconductor Manufacturing Company, Ltd. 3DIC interconnect devices and methods of forming same
US9508685B2 (en) * 2014-07-29 2016-11-29 Empire Technology Development Llc Vertically integrated wafers with thermal dissipation
US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
US9852988B2 (en) * 2015-12-18 2017-12-26 Invensas Bonding Technologies, Inc. Increased contact alignment tolerance for direct bonding
US10020336B2 (en) * 2015-12-28 2018-07-10 Semiconductor Energy Laboratory Co., Ltd. Imaging device and electronic device using three dimentional (3D) integration
JP2017139266A (ja) * 2016-02-01 2017-08-10 株式会社東芝 複合基板、半導体装置、およびこれらの製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240004346A (ko) 2021-04-28 2024-01-11 니덱 머신 툴 가부시키가이샤 반도체 장치의 제조 방법 및 상온 접합 장치

Also Published As

Publication number Publication date
CN107112199A (zh) 2017-08-29
KR20170086619A (ko) 2017-07-26
CN107112199B (zh) 2021-08-17
TW201635338A (zh) 2016-10-01
JP2016119415A (ja) 2016-06-30
EP3240015B1 (en) 2022-11-23
KR101994011B1 (ko) 2019-06-27
EP3240015A1 (en) 2017-11-01
TWI596651B (zh) 2017-08-21
WO2016103846A1 (ja) 2016-06-30
US10486263B2 (en) 2019-11-26
EP3240015A4 (en) 2018-08-01
US20170355040A1 (en) 2017-12-14

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