JP6137797B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6137797B2 JP6137797B2 JP2012205883A JP2012205883A JP6137797B2 JP 6137797 B2 JP6137797 B2 JP 6137797B2 JP 2012205883 A JP2012205883 A JP 2012205883A JP 2012205883 A JP2012205883 A JP 2012205883A JP 6137797 B2 JP6137797 B2 JP 6137797B2
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- Prior art keywords
- layer
- transistor
- oxide semiconductor
- conductive layer
- oxide
- Prior art date
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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- H—ELECTRICITY
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Description
本実施の形態では、開示する発明の一態様にかかる半導体装置及び半導体装置の作製方法について、図1乃至図4を用いて説明する。
本実施の形態では、半導体装置の他の一形態を、図5及び図6を用いて説明する。上記実施の形態と同一部分又は同様な機能を有する部分、及び工程は、上記実施の形態と同様に行うことができ、繰り返しの説明は省略する。また同じ箇所の詳細な説明は省略する。
本実施の形態では、半導体装置の他の一形態を、図7を用いて説明する。上記実施の形態と同一部分又は同様な機能を有する部分、及び工程は、上記実施の形態と同様に行うことができ、繰り返しの説明は省略する。また同じ箇所の詳細な説明は省略する。
本実施の形態では、実施の形態1乃至3に示すトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置の一例を、図面を用いて説明する。なお、本実施の形態の半導体装置は、トランジスタ162として実施の形態1乃至3に記載のトランジスタを適用して構成される。
本実施の形態においては、実施の形態1乃至3に示すトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置について、実施の形態4に示した構成と異なる構成を図9及び図10を用いて説明する。なお、本実施の形態の半導体装置は、トランジスタ162として実施の形態1乃至3に記載のトランジスタを適用して構成される。
本実施の形態では、先の実施の形態で示した半導体装置を携帯電話、スマートフォン、電子書籍などの携帯機器に応用した場合の例を図11乃至図14を用いて説明する。
本発明の一態様に係る半導体装置は、表示機器、パーソナルコンピュータ、記録媒体を備えた画像再生装置(代表的にはDVD:Digital Versatile Disc等の記録媒体を再生し、その画像を表示しうるディスプレイを有する装置)に用いることができる。その他に、本発明の一態様に係る半導体装置を用いることができる電子機器として、携帯電話、携帯型を含むゲーム機、携帯情報端末、電子書籍、ビデオカメラやデジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンター、プリンター複合機、現金自動預け入れ払い機(ATM)、自動販売機などが挙げられる。これら電子機器の具体例を図15に示す。
106 素子分離絶縁層
108 ゲート絶縁層
110 ゲート電極層
116 チャネル形成領域
120 不純物領域
124 金属間化合物領域
128 絶縁層
130 層間絶縁層
140a 導電層
140b 導電層
141a 導電層
141b 導電層
142 絶縁層
144 酸化物半導体層
145a 導電層
145b 導電層
146 ゲート絶縁層
148a 導電層
148b 導電層
150 絶縁層
152 絶縁層
153 導電層
156 配線
160 トランジスタ
162 トランジスタ
164 容量素子
250 メモリセル
251 メモリセルアレイ
251a メモリセルアレイ
251b メモリセルアレイ
253 周辺回路
254 容量素子
400 基板
401 ゲート電極層
402 ゲート絶縁層
403 酸化物半導体層
405 導電層
405a 導電層
405b 導電層
407 絶縁層
408 層間絶縁層
417 絶縁層
418 開口部
420 トランジスタ
430 トランジスタ
436 バッファ層
440 トランジスタ
450 トランジスタ
460 トランジスタ
465 導電層
465a 導電層
465b 導電層
470 トランジスタ
481a 埋め込み導電層
481b 埋め込み導電層
482a 酸化物半導体層
482b 酸化物半導体層
485 開口部
491 絶縁層
502 埋め込み導電層
504 埋め込み導電層
506 導電層
508 容量線
509 ワード線
510 nチャネル型トランジスタ
512 pチャネル型トランジスタ
801 トランジスタ
803 トランジスタ
804 トランジスタ
805 トランジスタ
806 トランジスタ
807 Xデコーダー
808 Yデコーダー
811 トランジスタ
812 保持容量
813 Xデコーダー
814 Yデコーダー
901 RF回路
902 アナログベースバンド回路
903 デジタルベースバンド回路
904 バッテリー
905 電源回路
906 アプリケーションプロセッサ
907 CPU
908 DSP
909 インターフェイス
910 フラッシュメモリ
911 ディスプレイコントローラ
912 メモリ回路
913 ディスプレイ
914 表示部
915 ソースドライバ
916 ゲートドライバ
917 音声回路
918 キーボード
919 タッチセンサ
950 メモリ回路
951 メモリコントローラ
952 メモリ
953 メモリ
954 スイッチ
955 スイッチ
956 ディスプレイコントローラ
957 ディスプレイ
1001 バッテリー
1002 電源回路
1003 マイクロプロセッサ
1004 フラッシュメモリ
1005 音声回路
1006 キーボード
1007 メモリ回路
1008 タッチパネル
1009 ディスプレイ
1010 ディスプレイコントローラ
5001 筐体
5002 筐体
5003 表示部
5004 表示部
5005 マイクロホン
5006 スピーカー
5007 操作キー
5008 スタイラス
5201 筐体
5202 表示部
5203 支持台
5401 筐体
5402 表示部
5403 キーボード
5404 ポインティングデバイス
5601 筐体
5602 筐体
5603 表示部
5604 表示部
5605 接続部
5606 操作キー
5801 筐体
5802 表示部
5803 音声入力部
5804 音声出力部
5805 操作キー
5806 受光部
Claims (5)
- 絶縁表面を有する基板上に設けられた酸化物半導体層と、
前記酸化物半導体層上に部分的に設けられた第1の導電層と、
前記第1の導電層上に部分的に設けられた第2の導電層と、
前記酸化物半導体層上、前記第1の導電層上及び前記第2の導電層上に設けられた絶縁層と、
前記絶縁層を介して前記酸化物半導体層上に設けられたゲート電極層と、
を有し、
前記第1の導電層は、前記酸化物半導体層と重なる領域を有し、前記第1の導電層は、前記酸化物半導体層と前記第1の導電層とが重なる領域において前記ゲート電極層と重なる領域を有し、
前記第2の導電層は、前記酸化物半導体層と重なる領域を有し、前記第2の導電層は、前記酸化物半導体層と前記第2の導電層とが重なる領域において前記ゲート電極層と重ならない半導体装置。 - 絶縁表面を有する基板上に設けられた酸化物半導体層と、
前記酸化物半導体層上に部分的に設けられた第1の導電層と、
前記第1の導電層上に部分的に設けられた第2の導電層と、
前記第2の導電層上に設けられた第1の絶縁層と、
前記酸化物半導体層上、前記第1の導電層上、前記第2の導電層上及び前記第1の絶縁層上に設けられた第2の絶縁層と、
前記第2の絶縁層を介して前記酸化物半導体層上に設けられたゲート電極層と、
を有し、
前記第1の導電層は、前記酸化物半導体層と重なる領域を有し、前記第1の導電層は、前記酸化物半導体層と前記第1の導電層とが重なる領域において前記ゲート電極層と重なる領域を有し、
前記第2の導電層は、前記酸化物半導体層と重なる領域を有し、前記第2の導電層は、前記酸化物半導体層と前記第2の導電層とが重なる領域において前記ゲート電極層と重ならない半導体装置。 - 請求項1又は2において、
前記絶縁表面を有する基板上に、バッファ層が設けられている半導体装置。 - 請求項3において、
前記バッファ層は、アルミニウム、ガリウム、ジルコニウム、ハフニウム、又は希土類元素から選択された一以上の元素の酸化物を含む層である半導体装置。 - 請求項1乃至請求項4のいずれか一において、
前記酸化物半導体層は、c軸配向した結晶を含む半導体装置。
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KR102089505B1 (ko) | 2020-03-16 |
TW201320341A (zh) | 2013-05-16 |
JP6972219B2 (ja) | 2021-11-24 |
US20130075722A1 (en) | 2013-03-28 |
JP6408640B2 (ja) | 2018-10-17 |
KR20140063832A (ko) | 2014-05-27 |
JP6689340B2 (ja) | 2020-04-28 |
JP2022009873A (ja) | 2022-01-14 |
TWI570923B (zh) | 2017-02-11 |
JP2019016803A (ja) | 2019-01-31 |
WO2013042696A1 (en) | 2013-03-28 |
JP2013080918A (ja) | 2013-05-02 |
JP2020129665A (ja) | 2020-08-27 |
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