JP5998521B2 - 不揮発性半導体メモリー及び不揮発性半導体メモリーの製造方法 - Google Patents

不揮発性半導体メモリー及び不揮発性半導体メモリーの製造方法 Download PDF

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JP5998521B2
JP5998521B2 JP2012041221A JP2012041221A JP5998521B2 JP 5998521 B2 JP5998521 B2 JP 5998521B2 JP 2012041221 A JP2012041221 A JP 2012041221A JP 2012041221 A JP2012041221 A JP 2012041221A JP 5998521 B2 JP5998521 B2 JP 5998521B2
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oxide film
silicon
nitride film
silicon oxide
silicon nitride
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JP2013179122A5 (https=
JP2013179122A (ja
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洋平 福本
洋平 福本
隆興 佐々木
隆興 佐々木
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Seiko Epson Corp
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Seiko Epson Corp
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Priority to JP2012041221A priority Critical patent/JP5998521B2/ja
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to PCT/JP2013/001031 priority patent/WO2013128864A1/ja
Priority to US14/377,278 priority patent/US9461138B2/en
Priority to CN201380010880.4A priority patent/CN104137239B/zh
Priority to KR1020147026353A priority patent/KR101618160B1/ko
Priority to TW102106457A priority patent/TWI609480B/zh
Publication of JP2013179122A publication Critical patent/JP2013179122A/ja
Publication of JP2013179122A5 publication Critical patent/JP2013179122A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/683—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/20—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

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JP2012041221A 2012-02-28 2012-02-28 不揮発性半導体メモリー及び不揮発性半導体メモリーの製造方法 Active JP5998521B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2012041221A JP5998521B2 (ja) 2012-02-28 2012-02-28 不揮発性半導体メモリー及び不揮発性半導体メモリーの製造方法
US14/377,278 US9461138B2 (en) 2012-02-28 2013-02-22 Non-volatile semiconductor memory with nitride sidewall contacting nitride layer of ONO gate stack and methods for producing the same
CN201380010880.4A CN104137239B (zh) 2012-02-28 2013-02-22 非易失性半导体存储器以及非易失性半导体存储器的制造方法
KR1020147026353A KR101618160B1 (ko) 2012-02-28 2013-02-22 불휘발성 반도체 메모리 및 불휘발성 반도체 메모리의 제조 방법
PCT/JP2013/001031 WO2013128864A1 (ja) 2012-02-28 2013-02-22 不揮発性半導体メモリー及び不揮発性半導体メモリーの製造方法
TW102106457A TWI609480B (zh) 2012-02-28 2013-02-23 Non-volatile semiconductor memory and non-volatile semiconductor memory manufacturing method

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JP2012041221A JP5998521B2 (ja) 2012-02-28 2012-02-28 不揮発性半導体メモリー及び不揮発性半導体メモリーの製造方法

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JP2013179122A JP2013179122A (ja) 2013-09-09
JP2013179122A5 JP2013179122A5 (https=) 2015-04-02
JP5998521B2 true JP5998521B2 (ja) 2016-09-28

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US (1) US9461138B2 (https=)
JP (1) JP5998521B2 (https=)
KR (1) KR101618160B1 (https=)
CN (1) CN104137239B (https=)
TW (1) TWI609480B (https=)
WO (1) WO2013128864A1 (https=)

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US11138497B2 (en) 2018-07-17 2021-10-05 Macronix International Co., Ltd In-memory computing devices for neural networks
US11636325B2 (en) 2018-10-24 2023-04-25 Macronix International Co., Ltd. In-memory data pooling for machine learning
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US11934480B2 (en) 2018-12-18 2024-03-19 Macronix International Co., Ltd. NAND block architecture for in-memory multiply-and-accumulate operations
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US10783963B1 (en) 2019-03-08 2020-09-22 Macronix International Co., Ltd. In-memory computation device with inter-page and intra-page data circuits
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US10910393B2 (en) 2019-04-25 2021-02-02 Macronix International Co., Ltd. 3D NOR memory having vertical source and drain structures
JP2021061450A (ja) * 2021-01-20 2021-04-15 セイコーエプソン株式会社 半導体装置及びその製造方法
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Also Published As

Publication number Publication date
CN104137239B (zh) 2018-01-12
TWI609480B (zh) 2017-12-21
US20150008500A1 (en) 2015-01-08
KR101618160B1 (ko) 2016-05-04
TW201347149A (zh) 2013-11-16
KR20140136000A (ko) 2014-11-27
JP2013179122A (ja) 2013-09-09
US9461138B2 (en) 2016-10-04
CN104137239A (zh) 2014-11-05
WO2013128864A1 (ja) 2013-09-06

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