JP5952771B2 - メモリ装置及びメモリコントローラ並びにメモリシステム - Google Patents
メモリ装置及びメモリコントローラ並びにメモリシステム Download PDFInfo
- Publication number
- JP5952771B2 JP5952771B2 JP2013091188A JP2013091188A JP5952771B2 JP 5952771 B2 JP5952771 B2 JP 5952771B2 JP 2013091188 A JP2013091188 A JP 2013091188A JP 2013091188 A JP2013091188 A JP 2013091188A JP 5952771 B2 JP5952771 B2 JP 5952771B2
- Authority
- JP
- Japan
- Prior art keywords
- refresh
- address
- row
- cell row
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40618—Refresh operations over multiple banks or interleaving
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40622—Partial refresh of memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4061—Calibration or ate or cycle tuning
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Memory System (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020120042411A KR101966858B1 (ko) | 2012-04-24 | 2012-04-24 | 휘발성 메모리 장치의 동작 방법, 휘발성 메모리 장치 및 메모리 시스템의 제어 방법 |
| KR10-2012-0042411 | 2012-04-24 | ||
| US13/720,998 | 2012-12-19 | ||
| US13/720,998 US9165637B2 (en) | 2012-04-24 | 2012-12-19 | Volatile memory device and a memory controller |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013229096A JP2013229096A (ja) | 2013-11-07 |
| JP2013229096A5 JP2013229096A5 (enExample) | 2015-12-10 |
| JP5952771B2 true JP5952771B2 (ja) | 2016-07-13 |
Family
ID=49381238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013091188A Active JP5952771B2 (ja) | 2012-04-24 | 2013-04-24 | メモリ装置及びメモリコントローラ並びにメモリシステム |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US9165637B2 (enExample) |
| JP (1) | JP5952771B2 (enExample) |
| KR (1) | KR101966858B1 (enExample) |
| CN (1) | CN103377158B (enExample) |
Families Citing this family (46)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101977665B1 (ko) * | 2012-07-12 | 2019-08-28 | 삼성전자주식회사 | 리프레쉬 주기를 조절하는 반도체 메모리 장치, 메모리 시스템 및 그 동작방법 |
| KR102048407B1 (ko) * | 2012-10-19 | 2019-11-25 | 삼성전자주식회사 | 리프레쉬 어드레스 생성기 및 휘발성 메모리 장치 |
| US9349433B2 (en) * | 2013-03-13 | 2016-05-24 | Inphi Corporation | Hidden refresh of weak memory storage cells in semiconductor memory |
| KR102125230B1 (ko) * | 2013-03-13 | 2020-06-22 | 삼성전자주식회사 | 디램 및 리프레시 제어방법 |
| KR20140113191A (ko) * | 2013-03-15 | 2014-09-24 | 삼성전자주식회사 | 반도체 메모리 장치 및 이의 리프레쉬 방법 |
| US10691344B2 (en) * | 2013-05-30 | 2020-06-23 | Hewlett Packard Enterprise Development Lp | Separate memory controllers to access data in memory |
| US9685217B2 (en) * | 2013-07-22 | 2017-06-20 | Taiwan Semiconductor Manufacturing Company Ltd. | Memory device with over-refresh and method thereof |
| JP2015076110A (ja) * | 2013-10-08 | 2015-04-20 | マイクロン テクノロジー, インク. | 半導体装置及びこれを備えるデータ処理システム |
| US10020045B2 (en) * | 2013-11-26 | 2018-07-10 | Micron Technology, Inc. | Partial access mode for dynamic random access memory |
| US9230634B2 (en) | 2013-12-09 | 2016-01-05 | Qualcomm Incorporated | Refresh scheme for memory cells with next bit table |
| KR102285994B1 (ko) * | 2014-05-13 | 2021-08-06 | 삼성전자주식회사 | 불휘발성 메모리 시스템 및 메모리 컨트롤러의 동작 방법 |
| CN108231109B (zh) * | 2014-06-09 | 2021-01-29 | 华为技术有限公司 | 动态随机存取存储器dram的刷新方法、设备以及系统 |
| US10020822B2 (en) * | 2014-07-21 | 2018-07-10 | Rensselaer Polytechnic Institute | Error tolerant memory system |
| JP6180450B2 (ja) * | 2015-02-02 | 2017-08-16 | キヤノン株式会社 | 制御装置、制御装置の制御方法及びプログラム |
| US9384820B1 (en) * | 2015-06-12 | 2016-07-05 | Apple Inc. | Aligning calibration segments for increased availability of memory subsystem |
| CN105632546A (zh) * | 2015-07-21 | 2016-06-01 | 上海磁宇信息科技有限公司 | 一种mram芯片及其自刷新操作方法 |
| KR102432701B1 (ko) * | 2015-11-18 | 2022-08-16 | 에스케이하이닉스 주식회사 | 리프레시 액티브 제어회로 및 이를 포함하는 메모리 장치 |
| KR102501651B1 (ko) * | 2016-03-02 | 2023-02-21 | 에스케이하이닉스 주식회사 | 리프레쉬 제어 장치 |
| KR20170118484A (ko) * | 2016-04-15 | 2017-10-25 | 에스케이하이닉스 주식회사 | 리프레쉬 제어 장치 |
| KR102439671B1 (ko) * | 2016-04-25 | 2022-09-02 | 에스케이하이닉스 주식회사 | 메모리 장치 |
| KR102517700B1 (ko) * | 2016-06-10 | 2023-04-05 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그의 동작 방법 |
| KR102558044B1 (ko) * | 2016-06-14 | 2023-07-20 | 에스케이하이닉스 주식회사 | 비교회로 및 반도체장치 |
| KR102553181B1 (ko) * | 2016-07-12 | 2023-07-10 | 에스케이하이닉스 주식회사 | 메모리 장치 및 메모리 장치의 동작 방법 |
| US10318187B2 (en) * | 2016-08-11 | 2019-06-11 | SK Hynix Inc. | Memory controller and memory system including the same |
| US10372566B2 (en) | 2016-09-16 | 2019-08-06 | Micron Technology, Inc. | Storing memory array operational information in nonvolatile subarrays |
| KR20180114712A (ko) * | 2017-04-11 | 2018-10-19 | 에스케이하이닉스 주식회사 | 리프레쉬 컨트롤러 및 그를 포함하는 반도체 메모리 장치 |
| CN108959106B (zh) * | 2017-05-18 | 2020-12-18 | 华为技术有限公司 | 内存访问方法和装置 |
| US10109339B1 (en) | 2017-07-28 | 2018-10-23 | Micron Technology, Inc. | Memory devices with selective page-based refresh |
| KR20190047451A (ko) * | 2017-10-27 | 2019-05-08 | 에스케이하이닉스 주식회사 | 저항 변화 메모리 장치를 구비한 반도체 메모리 시스템 및 그 구동 방법 |
| KR20190054812A (ko) * | 2017-11-14 | 2019-05-22 | 삼성전자주식회사 | 메모리 장치의 구동 방법 및 이를 수행하는 메모리 장치 |
| KR102408867B1 (ko) * | 2017-12-20 | 2022-06-14 | 삼성전자주식회사 | 반도체 메모리 장치, 메모리 시스템 및 반도체 메모리 장치의 동작 방법 |
| US10503670B2 (en) * | 2017-12-21 | 2019-12-10 | Advanced Micro Devices, Inc. | Dynamic per-bank and all-bank refresh |
| US20190243720A1 (en) * | 2018-02-08 | 2019-08-08 | Micron Technology, Inc. | Backup operations from volatile to non-volatile memory |
| KR20190123990A (ko) * | 2018-04-25 | 2019-11-04 | 에스케이하이닉스 주식회사 | 메모리 컨트롤러 및 그 동작 방법 |
| KR102573270B1 (ko) * | 2018-10-08 | 2023-08-31 | 삼성전자주식회사 | 반도체 메모리 장치 및 이의 구동 방법 |
| US10483978B1 (en) | 2018-10-16 | 2019-11-19 | Micron Technology, Inc. | Memory device processing |
| US10824573B1 (en) | 2019-04-19 | 2020-11-03 | Micron Technology, Inc. | Refresh and access modes for memory |
| US10991413B2 (en) * | 2019-07-03 | 2021-04-27 | Micron Technology, Inc. | Memory with programmable die refresh stagger |
| KR102406449B1 (ko) * | 2020-06-25 | 2022-06-08 | 에스케이하이닉스 주식회사 | 스토리지 장치 및 그 동작 방법 |
| KR102853722B1 (ko) * | 2020-08-31 | 2025-09-03 | 에스케이하이닉스 주식회사 | 래치 회로 및 이를 포함하는 메모리 장치 |
| US11520661B1 (en) | 2021-07-12 | 2022-12-06 | Apple Inc. | Scheduling of data refresh in a memory based on decoding latencies |
| US20230359558A1 (en) * | 2022-05-09 | 2023-11-09 | Advanced Micro Devices, Inc. | Approach for skipping near-memory processing commands |
| US12118221B2 (en) | 2022-06-22 | 2024-10-15 | Samsung Electronics Co., Ltd. | Semiconductor memory devices and memory systems including the same |
| CN115985365B (zh) * | 2023-01-03 | 2025-12-05 | 长鑫存储技术有限公司 | 一种补偿刷新方法、装置及存储器 |
| US20240296879A1 (en) * | 2023-01-13 | 2024-09-05 | Micron Technology, Inc. | Data integrity improvement programming techniques |
| CN117672290B (zh) * | 2024-02-01 | 2024-05-17 | 长鑫存储技术(西安)有限公司 | 存储器结构、刷新方法及存储器 |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1139861A (ja) * | 1997-07-16 | 1999-02-12 | Toshiba Corp | ダイナミック型半導体記憶装置 |
| US5909404A (en) | 1998-03-27 | 1999-06-01 | Lsi Logic Corporation | Refresh sampling built-in self test and repair circuit |
| US6058069A (en) | 1999-04-12 | 2000-05-02 | Etron Technology, Inc. | Protection circuit to ensure DRAM signal in write cycle |
| US6556482B2 (en) | 1999-06-24 | 2003-04-29 | Nec Electronics Corporation | Semiconductor memory device |
| US6275437B1 (en) * | 2000-06-30 | 2001-08-14 | Samsung Electronics Co., Ltd. | Refresh-type memory with zero write recovery time and no maximum cycle time |
| US7095669B2 (en) * | 2003-11-07 | 2006-08-22 | Infineon Technologies Ag | Refresh for dynamic cells with weak retention |
| JP4322694B2 (ja) * | 2004-02-04 | 2009-09-02 | エルピーダメモリ株式会社 | 半導体記憶装置および半導体記憶装置のリフレッシュ方法 |
| US7099221B2 (en) | 2004-05-06 | 2006-08-29 | Micron Technology, Inc. | Memory controller method and system compensating for memory cell data losses |
| US7193920B2 (en) | 2004-11-15 | 2007-03-20 | Hynix Semiconductor Inc. | Semiconductor memory device |
| KR100689708B1 (ko) * | 2005-01-05 | 2007-03-08 | 삼성전자주식회사 | 반도체 장치 |
| JP2006344345A (ja) * | 2005-05-12 | 2006-12-21 | Nec Electronics Corp | 揮発性半導体記憶装置 |
| US7283395B2 (en) * | 2005-06-24 | 2007-10-16 | Infineon Technologies Flash Gmbh & Co. Kg | Memory device and method for operating the memory device |
| US7734866B2 (en) * | 2005-08-04 | 2010-06-08 | Rambus Inc. | Memory with address-differentiated refresh rate to accommodate low-retention storage rows |
| US8086461B2 (en) | 2007-06-13 | 2011-12-27 | At&T Intellectual Property Ii, L.P. | System and method for tracking persons of interest via voiceprint |
| WO2010085405A1 (en) * | 2009-01-22 | 2010-07-29 | Rambus Inc. | Maintenance operations in a dram |
| US7990795B2 (en) * | 2009-02-19 | 2011-08-02 | Freescale Semiconductor, Inc. | Dynamic random access memory (DRAM) refresh |
| US7872929B2 (en) * | 2009-04-28 | 2011-01-18 | Lsi Corporation | Accessing memory cells in a memory circuit |
| KR101879442B1 (ko) * | 2011-05-25 | 2018-07-18 | 삼성전자주식회사 | 휘발성 메모리 장치의 리프레쉬 방법, 리프레쉬 어드레스 생성기 및 휘발성 메모리 장치 |
| KR101893895B1 (ko) * | 2011-12-16 | 2018-09-03 | 삼성전자주식회사 | 메모리 시스템 및 그 동작 제어 방법 |
| KR20130117198A (ko) * | 2012-04-18 | 2013-10-25 | 삼성전자주식회사 | 메모리 셀의 리프레쉬 방법 및 이를 이용한 반도체 메모리 장치 |
| KR102050473B1 (ko) * | 2012-09-24 | 2019-11-29 | 삼성전자주식회사 | 리프레쉬 주기를 조절하는 반도체 메모리 장치 및 메모리 시스템 |
| KR20140076735A (ko) * | 2012-12-13 | 2014-06-23 | 삼성전자주식회사 | 휘발성 메모리 장치 및 메모리 시스템 |
-
2012
- 2012-04-24 KR KR1020120042411A patent/KR101966858B1/ko active Active
- 2012-12-19 US US13/720,998 patent/US9165637B2/en active Active
-
2013
- 2013-04-19 CN CN201310136956.XA patent/CN103377158B/zh active Active
- 2013-04-24 JP JP2013091188A patent/JP5952771B2/ja active Active
-
2015
- 2015-09-18 US US14/858,140 patent/US9653141B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103377158B (zh) | 2018-04-20 |
| CN103377158A (zh) | 2013-10-30 |
| US9165637B2 (en) | 2015-10-20 |
| US9653141B2 (en) | 2017-05-16 |
| JP2013229096A (ja) | 2013-11-07 |
| US20130282973A1 (en) | 2013-10-24 |
| US20160012880A1 (en) | 2016-01-14 |
| KR20130119544A (ko) | 2013-11-01 |
| KR101966858B1 (ko) | 2019-04-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5952771B2 (ja) | メモリ装置及びメモリコントローラ並びにメモリシステム | |
| US9418723B2 (en) | Techniques to reduce memory cell refreshes for a memory device | |
| US9336851B2 (en) | Memory device and method of refreshing in a memory device | |
| US9293188B2 (en) | Memory and memory controller for high reliability operation and method | |
| US9978430B2 (en) | Memory devices providing a refresh request and memory controllers responsive to a refresh request | |
| US9536586B2 (en) | Memory device and memory system having the same | |
| US9361967B2 (en) | Semiconductor memory device | |
| CN107068175A (zh) | 易失性存储器设备、其信息提供方法及其刷新控制方法 | |
| US9042194B2 (en) | Refresh method, refresh address generator, volatile memory device including the same | |
| US20170062038A1 (en) | Memory systems that adjust an auto-refresh operation responsive to a self-refresh operation history | |
| US9767882B2 (en) | Method of refreshing memory device | |
| US9147461B1 (en) | Semiconductor memory device performing a refresh operation, and memory system including the same | |
| KR20140076735A (ko) | 휘발성 메모리 장치 및 메모리 시스템 | |
| KR20160056056A (ko) | 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 | |
| US20140237177A1 (en) | Memory module and memory system having the same | |
| KR20160094767A (ko) | 아이들 구간에서 정보 전달 기능을 수행하는 메모리 장치 및 방법 | |
| KR20150100184A (ko) | 메모리 모듈 및 이를 포함하는 메모리 시스템 | |
| KR102048217B1 (ko) | 메모리 장치 및 이를 갖는 메모리 시스템 | |
| US9449673B2 (en) | Memory device and memory system having the same | |
| CN114115715A (zh) | 执行存储器的低时延存取的设备和方法 | |
| KR102753562B1 (ko) | 메모리 장치의 구동 방법 및 메모리 시스템의 구동 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150911 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150911 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20150911 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20151001 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151021 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20151021 |
|
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20151027 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20151117 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160210 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160517 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160610 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5952771 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |