JP5921822B2 - 半導体素子及びその製造方法 - Google Patents

半導体素子及びその製造方法 Download PDF

Info

Publication number
JP5921822B2
JP5921822B2 JP2011113410A JP2011113410A JP5921822B2 JP 5921822 B2 JP5921822 B2 JP 5921822B2 JP 2011113410 A JP2011113410 A JP 2011113410A JP 2011113410 A JP2011113410 A JP 2011113410A JP 5921822 B2 JP5921822 B2 JP 5921822B2
Authority
JP
Japan
Prior art keywords
semiconductor device
conductive
tsv
substrate
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2011113410A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012009847A (ja
JP2012009847A5 (https=
Inventor
光辰 文
光辰 文
炳律 朴
炳律 朴
東燦 林
東燦 林
徳泳 鄭
徳泳 鄭
吉鉉 崔
吉鉉 崔
大録 ▲ペ▼
大録 ▲ペ▼
泌圭 姜
泌圭 姜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2012009847A publication Critical patent/JP2012009847A/ja
Publication of JP2012009847A5 publication Critical patent/JP2012009847A5/ja
Application granted granted Critical
Publication of JP5921822B2 publication Critical patent/JP5921822B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/213—Cross-sectional shapes or dispositions
    • H10W20/2134—TSVs extending from the semiconductor wafer into back-end-of-line layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/216—Through-semiconductor vias, e.g. TSVs characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43—Layouts of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP2011113410A 2010-06-28 2011-05-20 半導体素子及びその製造方法 Active JP5921822B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020100061080A KR101692434B1 (ko) 2010-06-28 2010-06-28 반도체 소자 및 그 제조 방법
KR10-2010-0061080 2010-06-28
US12/913,748 US8390120B2 (en) 2010-06-28 2010-10-27 Semiconductor device and method of fabricating the same
US12/913,748 2010-10-27

Publications (3)

Publication Number Publication Date
JP2012009847A JP2012009847A (ja) 2012-01-12
JP2012009847A5 JP2012009847A5 (https=) 2014-07-03
JP5921822B2 true JP5921822B2 (ja) 2016-05-24

Family

ID=45351765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011113410A Active JP5921822B2 (ja) 2010-06-28 2011-05-20 半導体素子及びその製造方法

Country Status (4)

Country Link
US (1) US8390120B2 (https=)
JP (1) JP5921822B2 (https=)
KR (1) KR101692434B1 (https=)
CN (1) CN102299136B (https=)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9831164B2 (en) * 2010-06-28 2017-11-28 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
US8659152B2 (en) * 2010-09-15 2014-02-25 Osamu Fujita Semiconductor device
JP5733002B2 (ja) * 2011-04-28 2015-06-10 富士通セミコンダクター株式会社 半導体装置の製造方法
US8541883B2 (en) * 2011-11-29 2013-09-24 Advanced Semiconductor Engineering, Inc. Semiconductor device having shielded conductive vias
CN103187400B (zh) * 2011-12-31 2016-02-17 中芯国际集成电路制造(上海)有限公司 硅通孔检测结构及检测方法
KR101918609B1 (ko) * 2012-01-11 2018-11-14 삼성전자 주식회사 집적회로 소자
CN104396009A (zh) * 2012-06-07 2015-03-04 伦塞勒工艺研究所 用以减少三维集成中硅穿孔(tsv)压力的保角涂层弹性垫的使用
US9275933B2 (en) 2012-06-19 2016-03-01 United Microelectronics Corp. Semiconductor device
US8956974B2 (en) * 2012-06-29 2015-02-17 Micron Technology, Inc. Devices, systems, and methods related to planarizing semiconductor devices after forming openings
KR101965906B1 (ko) * 2012-07-12 2019-04-04 에스케이하이닉스 주식회사 반도체 장치
KR101960496B1 (ko) * 2012-08-29 2019-03-20 에스케이하이닉스 주식회사 반도체 장치
US9112007B2 (en) 2012-09-14 2015-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Through via structure and method
KR101992352B1 (ko) 2012-09-25 2019-06-24 삼성전자주식회사 반도체 장치
US8952542B2 (en) * 2012-11-14 2015-02-10 Advanced Semiconductor Engineering, Inc. Method for dicing a semiconductor wafer having through silicon vias and resultant structures
KR20140073163A (ko) 2012-12-06 2014-06-16 삼성전자주식회사 반도체 장치 및 그의 형성방법
US8921150B2 (en) * 2012-12-06 2014-12-30 Taiwan Semiconductor Manufacturing Co., Ltd. Process to achieve contact protrusion for single damascene via
US8933564B2 (en) 2012-12-21 2015-01-13 Intel Corporation Landing structure for through-silicon via
US9761481B2 (en) * 2013-01-23 2017-09-12 GlobalFoundries, Inc. Integrated circuits and methods of forming the same with metal layer connection to through-semiconductor via
CN104051491B (zh) * 2013-03-15 2017-06-06 新加坡商格罗方德半导体私人有限公司 具有贯穿硅中介/硅导孔应用的非易失性内存器件
US9059111B2 (en) * 2013-04-11 2015-06-16 International Business Machines Corporation Reliable back-side-metal structure
US9287173B2 (en) * 2013-05-23 2016-03-15 United Microelectronics Corp. Through silicon via and process thereof
CN103280427B (zh) * 2013-06-13 2016-08-10 华进半导体封装先导技术研发中心有限公司 一种tsv正面端部互连工艺
US9147642B2 (en) * 2013-10-31 2015-09-29 Nanya Technology Corporation Integrated circuit device
US9476927B2 (en) 2014-01-22 2016-10-25 GlobalFoundries, Inc. Structure and method to determine through silicon via build integrity
CN103811416B (zh) * 2014-02-27 2017-01-04 华进半导体封装先导技术研发中心有限公司 硅通孔侧壁的平坦化方法
CN103794554A (zh) * 2014-02-27 2014-05-14 华进半导体封装先导技术研发中心有限公司 改进的硅通孔结构制备方法
KR102161263B1 (ko) * 2014-04-04 2020-10-05 삼성전자주식회사 자기정렬된 보호막으로 캡핑된 관통전극을 갖는 반도체 소자 및 그 제조방법
CN105336569B (zh) * 2014-07-10 2019-01-18 中国科学院微电子研究所 半导体器件制造方法
KR102303983B1 (ko) 2014-09-22 2021-09-23 삼성전자주식회사 반도체 장치 및 그 제조 방법, 및 상기 반도체 장치를 포함하는 반도체 패키지
KR102400185B1 (ko) 2014-11-12 2022-05-20 삼성전자주식회사 관통전극을 갖는 반도체 소자
CN104600027B (zh) * 2015-01-30 2017-10-27 华进半导体封装先导技术研发中心有限公司 一种tsv通孔的制备工艺
CN104749846B (zh) 2015-04-17 2017-06-30 京东方科技集团股份有限公司 一种阵列基板及其制作方法、显示面板
KR102444823B1 (ko) 2015-08-13 2022-09-20 삼성전자주식회사 관통전극을 갖는 반도체 소자 및 그 제조방법
KR102497205B1 (ko) 2016-03-03 2023-02-09 삼성전자주식회사 관통전극을 갖는 반도체 소자 및 그 제조방법
US9812414B1 (en) * 2016-06-17 2017-11-07 Nanya Technology Corporation Chip package and a manufacturing method thereof
US9917009B2 (en) * 2016-08-04 2018-03-13 Globalfoundries Inc. Methods of forming a through-substrate-via (TSV) and a metallization layer after formation of a semiconductor device
KR102542614B1 (ko) 2017-10-30 2023-06-15 삼성전자주식회사 이미지 센서
US11843020B2 (en) 2017-10-30 2023-12-12 Samsung Electronics Co., Ltd. Image sensor
KR102652452B1 (ko) * 2018-06-29 2024-03-29 삼성디스플레이 주식회사 표시장치 및 이의 제조 방법
JP2020038900A (ja) * 2018-09-04 2020-03-12 キオクシア株式会社 半導体装置
KR102652444B1 (ko) * 2019-01-11 2024-03-28 삼성전자주식회사 이미지 센서
US10867855B2 (en) * 2019-05-13 2020-12-15 Honeywell International Inc. Through silicon via fabrication
KR102695369B1 (ko) * 2019-09-04 2024-08-16 삼성전자주식회사 반도체 소자
TWI778594B (zh) 2020-05-26 2022-09-21 台灣積體電路製造股份有限公司 積體電路及其製造方法
CN114512469A (zh) 2020-11-16 2022-05-17 长鑫存储技术有限公司 半导体结构及其制作方法
CN115376993A (zh) * 2021-05-19 2022-11-22 长鑫存储技术有限公司 芯片、存储器及芯片的制备方法
US12119286B2 (en) * 2021-05-19 2024-10-15 Changxin Memory Technologies, Inc. Die, memory and method of manufacturing die
KR20230009205A (ko) 2021-07-08 2023-01-17 삼성전자주식회사 반도체 칩 및 이를 포함하는 반도체 패키지
US20230187316A1 (en) * 2021-12-15 2023-06-15 Changxin Memory Technologies, Inc. Semiconductor structure and method for manufacturing semiconductor structure
CN116264184A (zh) * 2021-12-15 2023-06-16 长鑫存储技术有限公司 一种半导体结构及其制造方法
US20240379500A1 (en) * 2023-05-11 2024-11-14 Taiwan Semiconductor Manufacturing Company, Ltd. Through substrate via landing on front end of line structure
CN116646321A (zh) * 2023-06-08 2023-08-25 武汉新芯集成电路制造有限公司 半导体结构及其形成方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994007349A1 (en) * 1992-09-24 1994-03-31 Hughes Aircraft Company Magnetic vias within multi-layer, 3-dimensional structures/substrates
US5378927A (en) * 1993-05-24 1995-01-03 International Business Machines Corporation Thin-film wiring layout for a non-planar thin-film structure
JP4011695B2 (ja) * 1996-12-02 2007-11-21 株式会社東芝 マルチチップ半導体装置用チップおよびその形成方法
US6809421B1 (en) * 1996-12-02 2004-10-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
JP3687435B2 (ja) * 1999-08-27 2005-08-24 セイコーエプソン株式会社 半導体チップおよびその製造方法、半導体装置、コンピュータ、回路基板ならびに電子機器
KR100363702B1 (ko) * 2000-12-29 2002-12-05 주식회사 하이닉스반도체 반도체장치의 스토리지노드 전극용 콘택 플러그 및 그제조 방법
JP3891299B2 (ja) * 2003-05-06 2007-03-14 セイコーエプソン株式会社 半導体装置の製造方法、半導体装置、半導体デバイス、電子機器
JP2005150299A (ja) * 2003-11-13 2005-06-09 Seiko Epson Corp 半導体チップ、半導体装置及び半導体装置の製造方法、回路基板及び電子機器
US7485968B2 (en) * 2005-08-11 2009-02-03 Ziptronix, Inc. 3D IC method and device
TWI416663B (zh) * 2005-08-26 2013-11-21 日立製作所股份有限公司 Semiconductor device manufacturing method and semiconductor device
US7633167B2 (en) * 2005-09-29 2009-12-15 Nec Electronics Corporation Semiconductor device and method for manufacturing same
JP5021992B2 (ja) * 2005-09-29 2012-09-12 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2008305938A (ja) 2007-06-07 2008-12-18 Toshiba Corp 半導体装置および半導体装置の製造方法
JP5089336B2 (ja) 2007-10-29 2012-12-05 新光電気工業株式会社 パッケージ用シリコン基板
JP2009252924A (ja) * 2008-04-04 2009-10-29 Toshiba Corp 半導体装置及びその製造方法
JP5343245B2 (ja) 2008-05-15 2013-11-13 新光電気工業株式会社 シリコンインターポーザの製造方法
US8183673B2 (en) * 2008-10-21 2012-05-22 Samsung Electronics Co., Ltd. Through-silicon via structures providing reduced solder spreading and methods of fabricating the same
US7687311B1 (en) * 2008-11-13 2010-03-30 Taiwan Semiconductor Manufacturing Company, Ltd. Method for producing stackable dies
JP2011228419A (ja) * 2010-04-19 2011-11-10 Renesas Electronics Corp 半導体集積回路装置および半導体集積回路装置の製造方法

Also Published As

Publication number Publication date
JP2012009847A (ja) 2012-01-12
US8390120B2 (en) 2013-03-05
KR101692434B1 (ko) 2017-01-18
CN102299136B (zh) 2016-03-02
CN102299136A (zh) 2011-12-28
US20110316168A1 (en) 2011-12-29
KR20120000690A (ko) 2012-01-04

Similar Documents

Publication Publication Date Title
JP5921822B2 (ja) 半導体素子及びその製造方法
JP5916077B2 (ja) 半導体装置の製造方法
CN101345231B (zh) 半导体芯片器件及其制造方法和包括其的堆叠封装
JP6548377B2 (ja) 集積回路素子及びその製造方法
US9214411B2 (en) Integrated circuit devices including a through-silicon via structure and methods of fabricating the same
KR101677507B1 (ko) 반도체 장치의 제조 방법
KR102064863B1 (ko) 관통 비아 구조체를 갖는 반도체 소자 제조 방법
US8076234B1 (en) Semiconductor device and method of fabricating the same including a conductive structure is formed through at least one dielectric layer after forming a via structure
KR101992352B1 (ko) 반도체 장치
US8987869B2 (en) Integrated circuit devices including through-silicon-vias having integral contact pads
CN110875271B (zh) 半导体芯片及其制造方法
TWI546872B (zh) 電子元件與半導體元件
JP3891299B2 (ja) 半導体装置の製造方法、半導体装置、半導体デバイス、電子機器
US9831164B2 (en) Semiconductor device and method of fabricating the same
KR20120090417A (ko) 반도체 장치 및 이의 제조 방법
US9530726B2 (en) Semiconductor device and method of fabricating the same
JP2008288595A (ja) 半導体パッケージ、その製造方法、半導体パッケージを利用したパッケージモジュール及び電子製品
KR101960686B1 (ko) 반도체 장치 및 이의 제조 방법
KR20140073163A (ko) 반도체 장치 및 그의 형성방법
JP2011003645A (ja) 半導体装置およびその製造方法
JP2013070057A (ja) 半導体チップ、これを含む半導体パッケージ、及びその製造方法
KR20140063271A (ko) 관통 전극을 갖는 반도체 장치 및 그 제조 방법
US9059067B2 (en) Semiconductor device with interposer and method manufacturing same
CN103378057A (zh) 半导体芯片以及其形成方法
US20210167007A1 (en) Redistribution structure and semiconductor package including the same

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140516

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20140516

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20141226

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20150422

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20150501

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150710

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20160314

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20160413

R150 Certificate of patent or registration of utility model

Ref document number: 5921822

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250