JP5921448B2 - 周期的な酸化およびエッチングのための装置と方法 - Google Patents

周期的な酸化およびエッチングのための装置と方法 Download PDF

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JP5921448B2
JP5921448B2 JP2012557251A JP2012557251A JP5921448B2 JP 5921448 B2 JP5921448 B2 JP 5921448B2 JP 2012557251 A JP2012557251 A JP 2012557251A JP 2012557251 A JP2012557251 A JP 2012557251A JP 5921448 B2 JP5921448 B2 JP 5921448B2
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gas
chamber
plasma
substrate
temperature
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JP2013522884A5 (enExample
JP2013522884A (ja
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ウダヤン ガングリー，
ウダヤン ガングリー，
好隆 横田
好隆 横田
クリストファー， エス． オルセン，
クリストファー， エス． オルセン，
マシュー， ディー． スコットニー−キャッスル，
マシュー， ディー． スコットニー−キャッスル，
ヴィッキー グエン，
ヴィッキー グエン，
スワミナタン スリニバサン，
スワミナタン スリニバサン，
ウェイ リウ，
ウェイ リウ，
エフ． スウェンバーグ，ヨハネス，
エフ． スウェンバーグ，ヨハネス，
ノゼ， エー． マリン，
ノゼ， エー． マリン，
バラクリシュナ，　アジト
アジト バラクリシュナ，
ジェイコブ ニューマン，
ジェイコブ ニューマン，
ステファン， シー． ヒッカーソン，
ステファン， シー． ヒッカーソン，
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Applied Materials Inc
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Applied Materials Inc
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
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    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
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    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
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    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
JP2012557251A 2010-03-10 2011-03-10 周期的な酸化およびエッチングのための装置と方法 Active JP5921448B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/720,926 2010-03-10
US12/720,926 US20110061812A1 (en) 2009-09-11 2010-03-10 Apparatus and Methods for Cyclical Oxidation and Etching
PCT/US2011/027922 WO2011112823A2 (en) 2010-03-10 2011-03-10 Apparatus and methods for cyclical oxidation and etching

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JP2013522884A JP2013522884A (ja) 2013-06-13
JP2013522884A5 JP2013522884A5 (enExample) 2014-04-24
JP5921448B2 true JP5921448B2 (ja) 2016-05-24

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US (1) US20110061812A1 (enExample)
JP (1) JP5921448B2 (enExample)
KR (3) KR20180021244A (enExample)
CN (2) CN106024587B (enExample)
TW (1) TWI517240B (enExample)
WO (1) WO2011112823A2 (enExample)

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