JP5689581B2 - ポリシリコンの除去を制御するための方法 - Google Patents

ポリシリコンの除去を制御するための方法 Download PDF

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Publication number
JP5689581B2
JP5689581B2 JP2008534569A JP2008534569A JP5689581B2 JP 5689581 B2 JP5689581 B2 JP 5689581B2 JP 2008534569 A JP2008534569 A JP 2008534569A JP 2008534569 A JP2008534569 A JP 2008534569A JP 5689581 B2 JP5689581 B2 JP 5689581B2
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JP
Japan
Prior art keywords
polishing
pluronic
polysilicon
substrate
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2008534569A
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English (en)
Japanese (ja)
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JP2009510797A5 (enExample
JP2009510797A (ja
Inventor
ディサード,ジェフリー
ジョーンズ,ティモシー
フィーニー,ポール
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CMC Materials LLC
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Cabot Microelectronics Corp
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Publication of JP2009510797A publication Critical patent/JP2009510797A/ja
Publication of JP2009510797A5 publication Critical patent/JP2009510797A5/ja
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Expired - Fee Related legal-status Critical Current
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09GPOLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00Polishing compositions
    • C09G1/02Polishing compositions containing abrasives or grinding agents
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
JP2008534569A 2005-10-04 2006-09-29 ポリシリコンの除去を制御するための方法 Expired - Fee Related JP5689581B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/243,140 US20070077865A1 (en) 2005-10-04 2005-10-04 Method for controlling polysilicon removal
US11/243,140 2005-10-04
PCT/US2006/037831 WO2007041203A1 (en) 2005-10-04 2006-09-29 Method for controlling polysilicon removal

Publications (3)

Publication Number Publication Date
JP2009510797A JP2009510797A (ja) 2009-03-12
JP2009510797A5 JP2009510797A5 (enExample) 2009-11-05
JP5689581B2 true JP5689581B2 (ja) 2015-03-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008534569A Expired - Fee Related JP5689581B2 (ja) 2005-10-04 2006-09-29 ポリシリコンの除去を制御するための方法

Country Status (6)

Country Link
US (1) US20070077865A1 (enExample)
JP (1) JP5689581B2 (enExample)
KR (1) KR101165875B1 (enExample)
CN (1) CN101322227B (enExample)
TW (1) TWI316272B (enExample)
WO (1) WO2007041203A1 (enExample)

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Also Published As

Publication number Publication date
CN101322227B (zh) 2010-12-01
KR101165875B1 (ko) 2012-07-13
CN101322227A (zh) 2008-12-10
TWI316272B (en) 2009-10-21
KR20080064823A (ko) 2008-07-09
WO2007041203A1 (en) 2007-04-12
US20070077865A1 (en) 2007-04-05
JP2009510797A (ja) 2009-03-12
TW200731383A (en) 2007-08-16

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