WO2007041203A1 - Method for controlling polysilicon removal - Google Patents

Method for controlling polysilicon removal Download PDF

Info

Publication number
WO2007041203A1
WO2007041203A1 PCT/US2006/037831 US2006037831W WO2007041203A1 WO 2007041203 A1 WO2007041203 A1 WO 2007041203A1 US 2006037831 W US2006037831 W US 2006037831W WO 2007041203 A1 WO2007041203 A1 WO 2007041203A1
Authority
WO
WIPO (PCT)
Prior art keywords
polishing
copolymer
abrasive
substrate
pluronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2006/037831
Other languages
English (en)
French (fr)
Inventor
Jeffrey Dysard
Timothy Johns
Paul Feeney
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CMC Materials LLC
Original Assignee
Cabot Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cabot Microelectronics Corp filed Critical Cabot Microelectronics Corp
Priority to JP2008534569A priority Critical patent/JP5689581B2/ja
Priority to KR1020087008090A priority patent/KR101165875B1/ko
Priority to CN2006800449616A priority patent/CN101322227B/zh
Publication of WO2007041203A1 publication Critical patent/WO2007041203A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09GPOLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00Polishing compositions
    • C09G1/02Polishing compositions containing abrasives or grinding agents
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
PCT/US2006/037831 2005-10-04 2006-09-29 Method for controlling polysilicon removal Ceased WO2007041203A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008534569A JP5689581B2 (ja) 2005-10-04 2006-09-29 ポリシリコンの除去を制御するための方法
KR1020087008090A KR101165875B1 (ko) 2005-10-04 2006-09-29 다결정규소 제거 조절 방법
CN2006800449616A CN101322227B (zh) 2005-10-04 2006-09-29 控制多晶硅移除的方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/243,140 US20070077865A1 (en) 2005-10-04 2005-10-04 Method for controlling polysilicon removal
US11/243,140 2005-10-04

Publications (1)

Publication Number Publication Date
WO2007041203A1 true WO2007041203A1 (en) 2007-04-12

Family

ID=37499658

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/037831 Ceased WO2007041203A1 (en) 2005-10-04 2006-09-29 Method for controlling polysilicon removal

Country Status (6)

Country Link
US (1) US20070077865A1 (enExample)
JP (1) JP5689581B2 (enExample)
KR (1) KR101165875B1 (enExample)
CN (1) CN101322227B (enExample)
TW (1) TWI316272B (enExample)
WO (1) WO2007041203A1 (enExample)

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US8491808B2 (en) 2010-03-16 2013-07-23 Rohm And Haas Electronic Materials Cmp Holdings, Inc. Method of polishing a substrate comprising polysilicon, silicon oxide and silicon nitride
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TWI538971B (zh) * 2010-09-08 2016-06-21 巴斯夫歐洲公司 用於電子、機械及光學裝置之化學機械研磨基材之水性研磨組成物及方法
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TWI583755B (zh) * 2010-12-10 2017-05-21 巴斯夫歐洲公司 用於將含氧化矽介電質及多晶矽薄膜之基板化學機械拋光的水性拋光組成物及方法
KR20140012660A (ko) 2011-03-11 2014-02-03 바스프 에스이 베이스 웨이퍼 관통 비아들을 형성하는 방법
CN102744668B (zh) * 2011-04-20 2015-04-29 中芯国际集成电路制造(上海)有限公司 抛光方法以及浮栅的形成方法
US8440094B1 (en) 2011-10-27 2013-05-14 Rohm And Haas Electronic Materials Cmp Holdings, Inc. Method of polishing a substrate
US8435420B1 (en) 2011-10-27 2013-05-07 Rohm And Haas Electronic Materials Cmp Holdings, Inc. Method of polishing using tunable polishing formulation
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US9633863B2 (en) * 2012-07-11 2017-04-25 Cabot Microelectronics Corporation Compositions and methods for selective polishing of silicon nitride materials
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Also Published As

Publication number Publication date
TWI316272B (en) 2009-10-21
KR101165875B1 (ko) 2012-07-13
JP5689581B2 (ja) 2015-03-25
TW200731383A (en) 2007-08-16
JP2009510797A (ja) 2009-03-12
US20070077865A1 (en) 2007-04-05
CN101322227B (zh) 2010-12-01
KR20080064823A (ko) 2008-07-09
CN101322227A (zh) 2008-12-10

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