JP5424192B2 - 再成長ゲートを有する自己整合トレンチ電界効果トランジスタおよび再成長ベースコンタクト領域を有するバイポーラトランジスタおよび製造法 - Google Patents

再成長ゲートを有する自己整合トレンチ電界効果トランジスタおよび再成長ベースコンタクト領域を有するバイポーラトランジスタおよび製造法 Download PDF

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JP5424192B2
JP5424192B2 JP2008544405A JP2008544405A JP5424192B2 JP 5424192 B2 JP5424192 B2 JP 5424192B2 JP 2008544405 A JP2008544405 A JP 2008544405A JP 2008544405 A JP2008544405 A JP 2008544405A JP 5424192 B2 JP5424192 B2 JP 5424192B2
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JP2009518862A (ja
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ヨセフ ネイル メレット
イゴール サンキン
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パワー・インテグレーションズ・インコーポレーテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/80—Heterojunction BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

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  • Junction Field-Effect Transistors (AREA)
  • Bipolar Transistors (AREA)
JP2008544405A 2005-12-05 2006-12-04 再成長ゲートを有する自己整合トレンチ電界効果トランジスタおよび再成長ベースコンタクト領域を有するバイポーラトランジスタおよび製造法 Expired - Fee Related JP5424192B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/293,261 US7314799B2 (en) 2005-12-05 2005-12-05 Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making
US11/293,261 2005-12-05
PCT/US2006/046180 WO2007067458A1 (en) 2005-12-05 2006-12-04 Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making

Publications (3)

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JP2009518862A JP2009518862A (ja) 2009-05-07
JP2009518862A5 JP2009518862A5 (enExample) 2010-01-28
JP5424192B2 true JP5424192B2 (ja) 2014-02-26

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US (3) US7314799B2 (enExample)
EP (1) EP1969617B1 (enExample)
JP (1) JP5424192B2 (enExample)
KR (1) KR101318041B1 (enExample)
CN (2) CN102751320B (enExample)
AU (1) AU2006322108B2 (enExample)
CA (1) CA2632233A1 (enExample)
NZ (1) NZ568487A (enExample)
WO (1) WO2007067458A1 (enExample)

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US7314799B2 (en) 2005-12-05 2008-01-01 Semisouth Laboratories, Inc. Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making
US7648898B2 (en) * 2008-02-19 2010-01-19 Dsm Solutions, Inc. Method to fabricate gate electrodes
JP5324157B2 (ja) * 2008-08-04 2013-10-23 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN101901767B (zh) * 2009-05-26 2011-12-14 上海华虹Nec电子有限公司 获得垂直型沟道高压超级结半导体器件的方法
NZ597036A (en) * 2009-06-19 2014-01-31 Power Integrations Inc Methods of making vertical junction field effect transistors and bipolar junction transistors without ion implantation and devices made therewith
JP2011119512A (ja) * 2009-12-04 2011-06-16 Denso Corp 半導体装置およびその製造方法
US8969912B2 (en) 2011-08-04 2015-03-03 Avogy, Inc. Method and system for a GaN vertical JFET utilizing a regrown channel
US9184305B2 (en) * 2011-08-04 2015-11-10 Avogy, Inc. Method and system for a GAN vertical JFET utilizing a regrown gate
US8716078B2 (en) * 2012-05-10 2014-05-06 Avogy, Inc. Method and system for a gallium nitride vertical JFET with self-aligned gate metallization
JP6138619B2 (ja) * 2013-07-30 2017-05-31 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
JP2016032014A (ja) * 2014-07-29 2016-03-07 日本電信電話株式会社 窒化物半導体装置の製造方法
CN105070767B (zh) * 2015-08-05 2018-04-20 西安电子科技大学 一种基于碳基复合电极的高温SiC JFET器件
CN105097456B (zh) * 2015-08-24 2018-09-11 泰科天润半导体科技（北京）有限公司 一种用于碳化硅器件的自对准方法
CN108292593B (zh) * 2015-09-30 2023-02-17 东京毅力科创株式会社 使用极紫外光刻对衬底进行图案化的方法
CN107681001B (zh) * 2017-07-24 2020-04-07 中国电子科技集团公司第五十五研究所 一种碳化硅开关器件及制作方法
CN116544282B (zh) * 2023-07-06 2024-04-09 深圳平创半导体有限公司 碳化硅结型栅双极型晶体管器件及其制作方法

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US4945394A (en) * 1987-10-26 1990-07-31 North Carolina State University Bipolar junction transistor on silicon carbide
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JPH09172187A (ja) * 1995-12-19 1997-06-30 Hitachi Ltd 接合型電界効果半導体装置およびその製造方法
US5859447A (en) * 1997-05-09 1999-01-12 Yang; Edward S. Heterojunction bipolar transistor having heterostructure ballasting emitter
EP1710842B1 (en) * 1999-03-15 2008-11-12 Matsushita Electric Industrial Co., Ltd. Method for fabricating a bipolar transistor and a MISFET semiconductor device
GB9928285D0 (en) * 1999-11-30 2000-01-26 Koninkl Philips Electronics Nv Manufacture of trench-gate semiconductor devices
EP1128429A1 (de) 2000-02-22 2001-08-29 Infineon Technologies AG Verfahren zur Herstellung von bipolaren Transistoren im BiCMOS-Verfahren
US6861324B2 (en) * 2001-06-15 2005-03-01 Maxim Integrated Products, Inc. Method of forming a super self-aligned hetero-junction bipolar transistor
AU2002367561A1 (en) * 2001-07-12 2003-09-16 Mississippi State University Self-aligned transistor and diode topologies
JP2003069039A (ja) * 2001-08-29 2003-03-07 Denso Corp 炭化珪素半導体装置およびその製造方法
JP4288907B2 (ja) * 2001-08-29 2009-07-01 株式会社デンソー 炭化珪素半導体装置及びその製造方法
JP4060580B2 (ja) * 2001-11-29 2008-03-12 株式会社ルネサステクノロジ ヘテロ接合バイポーラトランジスタ
JP4110875B2 (ja) * 2002-08-09 2008-07-02 株式会社デンソー 炭化珪素半導体装置
JP2004134547A (ja) * 2002-10-10 2004-04-30 Hitachi Ltd 半導体装置
JP4489446B2 (ja) * 2004-01-21 2010-06-23 独立行政法人科学技術振興機構 ガリウム含有窒化物単結晶の製造方法
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US7314799B2 (en) 2005-12-05 2008-01-01 Semisouth Laboratories, Inc. Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making

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Publication number Publication date
CN102751320A (zh) 2012-10-24
AU2006322108A1 (en) 2007-06-14
KR101318041B1 (ko) 2013-10-14
NZ568487A (en) 2011-07-29
US20120305994A1 (en) 2012-12-06
US20080061362A1 (en) 2008-03-13
AU2006322108B2 (en) 2011-04-14
CN101341579B (zh) 2012-03-21
JP2009518862A (ja) 2009-05-07
CN101341579A (zh) 2009-01-07
US7314799B2 (en) 2008-01-01
CN102751320B (zh) 2015-05-13
WO2007067458A1 (en) 2007-06-14
EP1969617A1 (en) 2008-09-17
CA2632233A1 (en) 2007-06-14
EP1969617B1 (en) 2015-02-25
US20070275527A1 (en) 2007-11-29
KR20080075025A (ko) 2008-08-13
US8729628B2 (en) 2014-05-20

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