JP5258716B2 - プリント基板及びその製造方法 - Google Patents
プリント基板及びその製造方法 Download PDFInfo
- Publication number
- JP5258716B2 JP5258716B2 JP2009213190A JP2009213190A JP5258716B2 JP 5258716 B2 JP5258716 B2 JP 5258716B2 JP 2009213190 A JP2009213190 A JP 2009213190A JP 2009213190 A JP2009213190 A JP 2009213190A JP 5258716 B2 JP5258716 B2 JP 5258716B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating member
- circuit board
- printed circuit
- trench
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 108
- 230000008569 process Effects 0.000 claims abstract description 56
- 229910000679 solder Inorganic materials 0.000 claims abstract description 18
- 239000010410 layer Substances 0.000 claims description 151
- 238000007747 plating Methods 0.000 claims description 20
- 238000007772 electroless plating Methods 0.000 claims description 14
- 238000009713 electroplating Methods 0.000 claims description 12
- 238000012545 processing Methods 0.000 claims description 12
- 239000002335 surface treatment layer Substances 0.000 claims description 9
- 239000011229 interlayer Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 238000010030 laminating Methods 0.000 claims 2
- 238000000926 separation method Methods 0.000 abstract description 5
- 239000000654 additive Substances 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000005470 impregnation Methods 0.000 description 3
- 238000007517 polishing process Methods 0.000 description 3
- 229910000990 Ni alloy Inorganic materials 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000002679 ablation Methods 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/114—Pad being close to via, but not surrounding the via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49204—Contact or terminal manufacturing
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
図11は、本発明の好適な実施例によるプリント基板の断面図である。以下、同図を参照して本実施例によるプリント基板100について説明する。
図12〜図18は、図11に示すプリント基板の製造方法を工程順に示す工程断面図である。以下、これを参照して本実施例によるプリント基板の製造方法について説明する。
120 離型層
130 絶縁部材
140 パターン用トレンチ
142 バンプパッド用トレンチ
150 回路パターン
152 バンプパッド
154 表面処理層
162 ビルドアップ絶縁層
164 回路層
170 ソルダレジスト層
172 オープン部
Claims (12)
- 絶縁部材の一面に含浸された回路パターン;
前記回路パターンと直接連結されるように前記絶縁部材に形成され、前記絶縁部材の外部に突出するように形成されているとともに、前記回路パターンと接する部分から突出された部分まで均一な直径を持つバンプパッド;
前記絶縁部材の一面に積層されたビルドアップ絶縁層に前記回路パターンと連結されるビアを含む回路層が形成されたビルドアップ層;及び
前記ビルドアップ層に積層されたソルダレジスト層を含み、
前記回路パターンは、前記絶縁部材が前記ビルドアップ絶縁層に接する一面に含浸され、前記ビルドアップ絶縁層に接しており、最も外側に形成されているとともに、前記バンプパッドと一体となっていることを特徴とするプリント基板。 - 前記絶縁部材が、厚さ方向の一部に形成されたパターン用トレンチを含み、前記回路パターンは前記パターン用トレンチの内部に形成されていることを特徴とする請求項1に記載のプリント基板。
- 前記バンプパッドが、下側が前記絶縁部材の内部に含浸された状態で、上側が前記絶縁部材から突出するように形成されていることを特徴とする請求項1に記載のプリント基板。
- 前記バンプパッドが、メッキ層であることを特徴とする請求項1に記載のプリント基板。
- 前記絶縁部材の外部に突出した前記バンプパッドの表面には、表面処理層が形成されていることを特徴とする請求項1に記載のプリント基板。
- 前記ソルダレジスト層には、前記回路層中のパッド部を露出させるオープン部が形成されていることを特徴とする請求項1に記載のプリント基板。
- (A)キャリアに離型層及び絶縁部材を順次積層し、インプリンティング工法によって前記絶縁部材にパターン用トレンチを加工し、前記絶縁部材と前記離型層を貫通するバンプパッド用トレンチを加工する段階;
(B)前記パターン用トレンチ及び前記バンプパッド用トレンチにメッキ工程を施して回路パターン及びバンプパッドを形成する段階;
(C)前記絶縁部材にビルドアップ絶縁層を積層し、層間連結のためのビアを含む回路層を形成する段階;及び
(D)前記ビルドアップ絶縁層にソルダレジスト層を形成し、前記キャリアと前記離型層を除去する段階;
を含むことを特徴とするプリント基板の製造方法。 - 前記(A)段階で、前記パターン用トレンチが、厚方向の絶縁部材の一部に形成されることを特徴とする請求項7に記載のプリント基板の製造方法。
- 前記(A)段階で、前記離型層及び前記絶縁部材が、前記キャリアの一面または両面に塗布されることを特徴とする請求項7に記載のプリント基板の製造方法。
- 前記離型層が、樹脂材質で形成されることを特徴とする請求項7に記載のプリント基板の製造方法。
- 前記(B)段階が、
(B1)前記パターン用トレンチ及び前記バンプパッド用トレンチの内壁とともに前記絶縁部材の表面に無電解メッキ層を形成する段階;
(B2)前記パターン用トレンチ及び前記バンプパッド用トレンチの内部に電解メッキ層を形成する段階;及び
(B3)前記絶縁部材の上部に形成された前記無電解メッキ層及び前記電解メッキ層を除去する段階;
を含むことを特徴とする請求項7に記載のプリント基板の製造方法。 - 前記(D)段階が、
(D1)前記ビルドアップ絶縁層にソルダレジスト層を形成する段階;
(D2)前記ソルダレジスト層に前記回路層中のパッド部を露出させるオープン部を加工する段階;
(D3)前記キャリアを除去する段階;
(D4)前記バンプパッドの露出面に表面処理層を形成する段階;及び
(D5)前記離型層を除去する段階;
を含むことを特徴とする請求項7に記載のプリント基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2009-0070637 | 2009-07-31 | ||
KR1020090070637A KR101067031B1 (ko) | 2009-07-31 | 2009-07-31 | 인쇄회로기판 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011035359A JP2011035359A (ja) | 2011-02-17 |
JP5258716B2 true JP5258716B2 (ja) | 2013-08-07 |
Family
ID=43525940
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009213190A Active JP5258716B2 (ja) | 2009-07-31 | 2009-09-15 | プリント基板及びその製造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US8729406B2 (ja) |
JP (1) | JP5258716B2 (ja) |
KR (1) | KR101067031B1 (ja) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11266014B2 (en) | 2008-02-14 | 2022-03-01 | Metrospec Technology, L.L.C. | LED lighting systems and method |
US8007286B1 (en) * | 2008-03-18 | 2011-08-30 | Metrospec Technology, Llc | Circuit boards interconnected by overlapping plated through holes portions |
US8851356B1 (en) | 2008-02-14 | 2014-10-07 | Metrospec Technology, L.L.C. | Flexible circuit board interconnection and methods |
US10334735B2 (en) | 2008-02-14 | 2019-06-25 | Metrospec Technology, L.L.C. | LED lighting systems and methods |
JP2012186270A (ja) * | 2011-03-04 | 2012-09-27 | Toppan Printing Co Ltd | 半導体パッケージの製造方法 |
CN102271458A (zh) * | 2011-05-11 | 2011-12-07 | 福建星网锐捷网络有限公司 | 印制电路板、实现的方法及其去除电子元件的方法 |
JP6063183B2 (ja) * | 2012-08-31 | 2017-01-18 | パナソニックIpマネジメント株式会社 | 剥離可能銅箔付き基板及び回路基板の製造方法 |
TWI487436B (zh) * | 2013-05-10 | 2015-06-01 | Unimicron Technology Corp | 承載基板及其製作方法 |
KR101590453B1 (ko) | 2013-07-31 | 2016-02-02 | 앰코 테크놀로지 코리아 주식회사 | 휨 개선을 위한 반도체 칩 다이 구조 및 방법 |
JP2016076534A (ja) * | 2014-10-03 | 2016-05-12 | イビデン株式会社 | 金属ポスト付きプリント配線板およびその製造方法 |
CN107424973B (zh) * | 2016-05-23 | 2020-01-21 | 凤凰先驱股份有限公司 | 封装基板及其制法 |
CN107872929B (zh) * | 2016-09-27 | 2021-02-05 | 欣兴电子股份有限公司 | 线路板与其制作方法 |
US10849200B2 (en) | 2018-09-28 | 2020-11-24 | Metrospec Technology, L.L.C. | Solid state lighting circuit with current bias and method of controlling thereof |
KR20200062648A (ko) * | 2018-11-27 | 2020-06-04 | 삼성전기주식회사 | 인쇄회로기판 |
US11942334B2 (en) * | 2018-12-21 | 2024-03-26 | Intel Corporation | Microelectronic assemblies having conductive structures with different thicknesses |
KR20200097977A (ko) * | 2019-02-11 | 2020-08-20 | 삼성전기주식회사 | 인쇄회로기판 |
JP7240909B2 (ja) | 2019-03-13 | 2023-03-16 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
US11637060B2 (en) | 2019-07-18 | 2023-04-25 | Unimicron Technology Corp. | Wiring board and method of manufacturing the same |
CN118102575A (zh) * | 2019-12-31 | 2024-05-28 | 奥特斯(中国)有限公司 | 部件承载件 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3042591A (en) * | 1957-05-20 | 1962-07-03 | Motorola Inc | Process for forming electrical conductors on insulating bases |
JP2000101245A (ja) * | 1998-09-24 | 2000-04-07 | Ngk Spark Plug Co Ltd | 積層樹脂配線基板及びその製造方法 |
KR100332304B1 (ko) | 1999-05-31 | 2002-04-12 | 정해원 | 다층 인쇄회로기판 제조방법 |
JP4520606B2 (ja) * | 2000-09-11 | 2010-08-11 | イビデン株式会社 | 多層回路基板の製造方法 |
JP4701506B2 (ja) * | 2000-09-14 | 2011-06-15 | ソニー株式会社 | 回路ブロック体の製造方法、配線回路装置の製造方法並びに半導体装置の製造方法 |
JP4070470B2 (ja) * | 2002-01-24 | 2008-04-02 | 新光電気工業株式会社 | 半導体装置用多層回路基板及びその製造方法並びに半導体装置 |
JP2005109108A (ja) | 2003-09-30 | 2005-04-21 | Ibiden Co Ltd | ビルドアッププリント配線板及びその製造方法 |
JP4541763B2 (ja) | 2004-01-19 | 2010-09-08 | 新光電気工業株式会社 | 回路基板の製造方法 |
JP4549693B2 (ja) | 2004-02-27 | 2010-09-22 | 日本特殊陶業株式会社 | 配線基板の製造方法 |
JP2006162605A (ja) * | 2004-11-11 | 2006-06-22 | Jsr Corp | シート状プローブおよびプローブカードならびにウエハの検査方法 |
KR100619346B1 (ko) * | 2004-12-06 | 2006-09-08 | 삼성전기주식회사 | 도금 인입선이 없는 인쇄회로기판의 제조 방법 |
TWI295550B (en) | 2005-12-20 | 2008-04-01 | Phoenix Prec Technology Corp | Structure of circuit board and method for fabricating the same |
JP2007173727A (ja) * | 2005-12-26 | 2007-07-05 | Shinko Electric Ind Co Ltd | 配線基板の製造方法 |
US20080157910A1 (en) | 2006-12-29 | 2008-07-03 | Park Chang-Min | Amorphous soft magnetic layer for on-die inductively coupled wires |
US20080157911A1 (en) | 2006-12-29 | 2008-07-03 | Fajardo Arnel M | Soft magnetic layer for on-die inductively coupled wires with high electrical resistance |
KR100841987B1 (ko) | 2007-07-10 | 2008-06-27 | 삼성전기주식회사 | 다층 인쇄회로기판 제조방법 |
KR100929839B1 (ko) * | 2007-09-28 | 2009-12-04 | 삼성전기주식회사 | 기판제조방법 |
US20100167466A1 (en) * | 2008-12-31 | 2010-07-01 | Ravikumar Adimula | Semiconductor package substrate with metal bumps |
KR101067207B1 (ko) | 2009-04-16 | 2011-09-22 | 삼성전기주식회사 | 트렌치 기판 및 그 제조방법 |
-
2009
- 2009-07-31 KR KR1020090070637A patent/KR101067031B1/ko active IP Right Grant
- 2009-09-14 US US12/559,449 patent/US8729406B2/en active Active
- 2009-09-15 JP JP2009213190A patent/JP5258716B2/ja active Active
-
2013
- 2013-06-18 US US13/921,128 patent/US20140000952A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20110024180A1 (en) | 2011-02-03 |
US20140000952A1 (en) | 2014-01-02 |
US8729406B2 (en) | 2014-05-20 |
KR20110012774A (ko) | 2011-02-09 |
JP2011035359A (ja) | 2011-02-17 |
KR101067031B1 (ko) | 2011-09-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5258716B2 (ja) | プリント基板及びその製造方法 | |
KR101077380B1 (ko) | 인쇄회로기판 및 그 제조방법 | |
JP5331958B2 (ja) | 配線基板及び半導体パッケージ | |
JP5306789B2 (ja) | 多層配線基板及びその製造方法 | |
KR101109230B1 (ko) | 인쇄회로기판 및 그 제조방법 | |
JP6711509B2 (ja) | プリント回路基板、半導体パッケージ及びその製造方法 | |
US20090301766A1 (en) | Printed circuit board including electronic component embedded therein and method of manufacturing the same | |
KR101109344B1 (ko) | 인쇄회로기판 및 그 제조방법 | |
WO2015151512A1 (ja) | インターポーザ、半導体装置、インターポーザの製造方法、半導体装置の製造方法 | |
JP2010135721A (ja) | 金属バンプを持つプリント基板及びその製造方法 | |
JP4890959B2 (ja) | 配線基板及びその製造方法並びに半導体パッケージ | |
JP2008124247A (ja) | 部品内蔵基板及びその製造方法 | |
KR20110074012A (ko) | 캐리어기판, 그의 제조방법, 이를 이용한 인쇄회로기판 및 그의 제조방법 | |
JP2016134621A (ja) | 電子部品内蔵型印刷回路基板及びその製造方法 | |
KR100908986B1 (ko) | 코어리스 패키지 기판 및 제조 방법 | |
KR20100111858A (ko) | 인쇄회로기판 제조를 위한 범프 형성 방법 | |
KR100934107B1 (ko) | 미세 피치의 금속 범프를 제공하는 인쇄회로기판 제조 방법 | |
JP2002335059A (ja) | 配線基板及びその製造方法 | |
JP2018101776A (ja) | プリント回路基板及びパッケージ | |
KR101081153B1 (ko) | 임베디드 미세회로 기판 제조 방법 | |
TW200926377A (en) | Aluminum oxide-based substrate and method for manufacturing the same | |
JP4591098B2 (ja) | 半導体素子搭載用基板の製造方法 | |
JP2005244069A (ja) | 多層配線基板の製造方法 | |
JP2006245168A (ja) | 配線基板の製造方法 | |
JP2009081404A (ja) | 多層配線板の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110726 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111026 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20120515 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120918 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20120926 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20121030 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20130129 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20130201 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130228 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20130326 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20130423 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20160502 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5258716 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |