JP5078687B2 - 多層配線基板の製造方法 - Google Patents

多層配線基板の製造方法 Download PDF

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Publication number
JP5078687B2
JP5078687B2 JP2008070492A JP2008070492A JP5078687B2 JP 5078687 B2 JP5078687 B2 JP 5078687B2 JP 2008070492 A JP2008070492 A JP 2008070492A JP 2008070492 A JP2008070492 A JP 2008070492A JP 5078687 B2 JP5078687 B2 JP 5078687B2
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JP
Japan
Prior art keywords
alignment mark
wiring board
multilayer wiring
conductor circuit
resin
Prior art date
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Expired - Fee Related
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JP2008070492A
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English (en)
Japanese (ja)
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JP2008270768A (ja
Inventor
渡辺  悟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2008070492A priority Critical patent/JP5078687B2/ja
Priority to TW097109418A priority patent/TWI396474B/zh
Publication of JP2008270768A publication Critical patent/JP2008270768A/ja
Application granted granted Critical
Publication of JP5078687B2 publication Critical patent/JP5078687B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
JP2008070492A 2007-03-22 2008-03-18 多層配線基板の製造方法 Expired - Fee Related JP5078687B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008070492A JP5078687B2 (ja) 2007-03-22 2008-03-18 多層配線基板の製造方法
TW097109418A TWI396474B (zh) 2007-03-22 2008-03-18 多層配線基板的製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007075662 2007-03-22
JP2007075662 2007-03-22
JP2008070492A JP5078687B2 (ja) 2007-03-22 2008-03-18 多層配線基板の製造方法

Publications (2)

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JP2008270768A JP2008270768A (ja) 2008-11-06
JP5078687B2 true JP5078687B2 (ja) 2012-11-21

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JP2008070492A Expired - Fee Related JP5078687B2 (ja) 2007-03-22 2008-03-18 多層配線基板の製造方法

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JP (1) JP5078687B2 (zh)
CN (1) CN101272663B (zh)
TW (1) TWI396474B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI484886B (zh) * 2013-08-29 2015-05-11 Unimicron Technology Corp 多層電路板的製作方法
TWI484885B (zh) * 2013-08-28 2015-05-11 Unimicron Technology Corp 多層電路板的製作方法

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI404495B (zh) * 2010-06-29 2013-08-01 Univ Nat Pingtung Sci & Tech 在基板上形成電路圖案之方法
JP5855905B2 (ja) 2010-12-16 2016-02-09 日本特殊陶業株式会社 多層配線基板及びその製造方法
JP2013051397A (ja) * 2011-08-03 2013-03-14 Ngk Spark Plug Co Ltd 配線基板の製造方法
CN102509696B (zh) * 2011-10-28 2016-04-06 上海华虹宏力半导体制造有限公司 对准标记的形成方法
CN102413633B (zh) * 2011-11-03 2014-04-30 华为技术有限公司 一种检测多层电路板偏位的装置及方法
JP2013135080A (ja) * 2011-12-26 2013-07-08 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
JPWO2013145043A1 (ja) * 2012-03-27 2015-08-03 パナソニックIpマネジメント株式会社 ビルドアップ基板およびその製造方法ならびに半導体集積回路パッケージ
US9137905B2 (en) * 2012-06-25 2015-09-15 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Alignment between layers of multilayer electronic support structures
US8952542B2 (en) * 2012-11-14 2015-02-10 Advanced Semiconductor Engineering, Inc. Method for dicing a semiconductor wafer having through silicon vias and resultant structures
TWI487076B (zh) * 2013-04-24 2015-06-01 矽品精密工業股份有限公司 中介板及其製法
CN103874321B (zh) * 2014-02-27 2017-11-07 京东方科技集团股份有限公司 电路板及其制造方法
JP6363854B2 (ja) * 2014-03-11 2018-07-25 キヤノン株式会社 形成方法、および物品の製造方法
KR101454477B1 (ko) 2014-04-07 2014-10-24 (주) 앤이오플랙스 고 다층 인쇄회로기판 및 그 제조방법
JP6075436B2 (ja) * 2015-11-17 2017-02-08 大日本印刷株式会社 サスペンション用基板、サスペンション、素子付サスペンション、ハードディスクドライブおよび支持枠付サスペンション用基板
CN105430869B (zh) * 2015-11-20 2018-06-22 广州兴森快捷电路科技有限公司 Ic测试板高孔位精度加工方法及制作方法
JP6619701B2 (ja) * 2016-06-20 2019-12-11 日本電信電話株式会社 受光素子およびその製造方法
JP7127995B2 (ja) * 2018-03-09 2022-08-30 日東電工株式会社 配線基板の製造方法
CN109940284B (zh) * 2019-01-25 2021-04-27 武汉铱科赛科技有限公司 一种线路板金手指激光切割方法和系统
WO2021030516A1 (en) * 2019-08-15 2021-02-18 Materion Corporation Beryllium oxide pedestals
CN112648946B (zh) * 2020-12-02 2022-04-12 益阳市明正宏电子有限公司 一种孔偏检测装置
CN113784545B (zh) * 2021-09-06 2023-05-12 大连崇达电路有限公司 一种印制板防止树脂塞孔孔破的方法
CN117998753B (zh) * 2024-04-03 2024-06-21 淄博芯材集成电路有限责任公司 激光钻孔对位方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766552A (ja) * 1993-08-23 1995-03-10 Hitachi Ltd 配線基板の製造方法
DE69835962T2 (de) * 1997-12-11 2007-01-04 Ibiden Co., Ltd., Ogaki Verfahren zur herstellung einer mehrschichtigen gedruckten leiterplatte
JP3160252B2 (ja) * 1997-12-11 2001-04-25 イビデン株式会社 多層プリント配線板の製造方法
JP4197070B2 (ja) * 1999-04-01 2008-12-17 イビデン株式会社 多層ビルドアップ配線板
US20020109775A1 (en) * 2001-02-09 2002-08-15 Excellon Automation Co. Back-lighted fiducial recognition system and method of use
JP2003209364A (ja) * 2002-01-15 2003-07-25 Cmk Corp 多層プリント配線板の製造方法
JP2003324263A (ja) * 2002-04-30 2003-11-14 Ngk Spark Plug Co Ltd プリント配線基板の製造方法
DE10326086B4 (de) * 2003-06-10 2006-04-13 Infineon Technologies Ag Verfahren und Justiermarken zur Positionierung eines Messkopfes auf einer Leiterplatte

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI484885B (zh) * 2013-08-28 2015-05-11 Unimicron Technology Corp 多層電路板的製作方法
TWI484886B (zh) * 2013-08-29 2015-05-11 Unimicron Technology Corp 多層電路板的製作方法

Also Published As

Publication number Publication date
CN101272663B (zh) 2011-07-20
TWI396474B (zh) 2013-05-11
CN101272663A (zh) 2008-09-24
TW200904267A (en) 2009-01-16
JP2008270768A (ja) 2008-11-06

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