JP4943629B2 - ターゲット修復用のイオンビーム - Google Patents

ターゲット修復用のイオンビーム Download PDF

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Publication number
JP4943629B2
JP4943629B2 JP2003396297A JP2003396297A JP4943629B2 JP 4943629 B2 JP4943629 B2 JP 4943629B2 JP 2003396297 A JP2003396297 A JP 2003396297A JP 2003396297 A JP2003396297 A JP 2003396297A JP 4943629 B2 JP4943629 B2 JP 4943629B2
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JP
Japan
Prior art keywords
charged particle
substrate
particle beam
alignment mark
ion beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003396297A
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English (en)
Japanese (ja)
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JP2004179165A5 (enExample
JP2004179165A (ja
Inventor
ブライアン・ミラー
Original Assignee
エフ・イ−・アイ・カンパニー
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Application filed by エフ・イ−・アイ・カンパニー filed Critical エフ・イ−・アイ・カンパニー
Publication of JP2004179165A publication Critical patent/JP2004179165A/ja
Publication of JP2004179165A5 publication Critical patent/JP2004179165A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/20Cleaning during device manufacture
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073Alignment marks and their environment
    • G03F9/708Mark formation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/262Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by physical means only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0402Apparatus for fluid treatment
    • H10P72/0418Apparatus for fluid treatment for etching
    • H10P72/0421Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0614Marking devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H10P72/53Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment using optical controlling means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/30Electron or ion beam tubes for processing objects
    • H01J2237/304Controlling tubes
    • H01J2237/30433System calibration
    • H01J2237/30438Registration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/30Electron or ion beam tubes for processing objects
    • H01J2237/317Processing objects on a microscale
    • H01J2237/3174Etching microareas
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/101Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/201Marks applied to devices, e.g. for alignment or identification located on the periphery of wafers, e.g. orientation notches or lot numbers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/301Marks applied to devices, e.g. for alignment or identification for alignment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/501Marks applied to devices, e.g. for alignment or identification for use before dicing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/501Marks applied to devices, e.g. for alignment or identification for use before dicing
    • H10W46/503Located in scribe lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/501Marks applied to devices, e.g. for alignment or identification for use before dicing
    • H10W46/507Located in dummy chips or in reference chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/601Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/603Formed on wafers or substrates before dicing and remaining on chips after dicing

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP2003396297A 2002-11-26 2003-11-26 ターゲット修復用のイオンビーム Expired - Fee Related JP4943629B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US42913502P 2002-11-26 2002-11-26
US60/429,135 2002-11-26

Publications (3)

Publication Number Publication Date
JP2004179165A JP2004179165A (ja) 2004-06-24
JP2004179165A5 JP2004179165A5 (enExample) 2007-01-11
JP4943629B2 true JP4943629B2 (ja) 2012-05-30

Family

ID=32298306

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003396297A Expired - Fee Related JP4943629B2 (ja) 2002-11-26 2003-11-26 ターゲット修復用のイオンビーム

Country Status (3)

Country Link
US (1) US7150811B2 (enExample)
EP (1) EP1424723B1 (enExample)
JP (1) JP4943629B2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
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KR100898924B1 (ko) * 2002-10-24 2009-05-26 엘지전자 주식회사 초소형 렌즈의 비구면 가공방법 및 그를 이용한 초소형렌즈의제조방법
US20050186753A1 (en) * 2004-02-25 2005-08-25 Ping-Hsu Chen FIB exposure of alignment marks in MIM technology
JP4405865B2 (ja) * 2004-06-24 2010-01-27 富士通マイクロエレクトロニクス株式会社 多層配線構造の製造方法及びfib装置
JP5254613B2 (ja) * 2004-08-24 2013-08-07 セラ セミコンダクター エンジニアリング ラボラトリーズ リミテッド 被加工物の有向多偏向イオンビームミリングならびにその程度の決定および制御
JP4216263B2 (ja) * 2005-03-09 2009-01-28 シャープ株式会社 製造検査解析システム、および製造検査解析方法
FR2884045A1 (fr) * 2005-03-29 2006-10-06 St Microelectronics Sa Identification d'un circuit integre de reference pour equipement de prise et pose
DE102008000709B3 (de) * 2008-03-17 2009-11-26 Carl Zeiss Smt Ag Reinigungsmodul, EUV-Lithographievorrichtung und Verfahren zu seiner Reinigung
KR101470267B1 (ko) 2010-11-05 2014-12-05 가부시키가이샤 히다치 하이테크놀로지즈 이온 밀링 장치
US9190261B2 (en) * 2011-08-25 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. Layer alignment in FinFET fabrication
EP2787523B1 (en) * 2013-04-03 2016-02-10 Fei Company Low energy ion milling or deposition
WO2016121079A1 (ja) * 2015-01-30 2016-08-04 株式会社 日立ハイテクノロジーズ イオンミリング装置を備えた電子顕微鏡、および三次元再構築方法
EP3249676B1 (en) 2016-05-27 2018-10-03 FEI Company Dual-beam charged-particle microscope with in situ deposition functionality
ES3010110B2 (es) * 2023-09-29 2025-12-18 Consejo Superior Investigacion Sistema de fabricacion de contactos electricos y metodo de fabricacion asociado

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US3860783A (en) 1970-10-19 1975-01-14 Bell Telephone Labor Inc Ion etching through a pattern mask
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Also Published As

Publication number Publication date
EP1424723B1 (en) 2015-01-07
EP1424723A3 (en) 2009-08-05
US20040099638A1 (en) 2004-05-27
US7150811B2 (en) 2006-12-19
JP2004179165A (ja) 2004-06-24
EP1424723A2 (en) 2004-06-02

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