JP4825891B2 - 半導体装置の製造方法およびテンプレート - Google Patents

半導体装置の製造方法およびテンプレート Download PDF

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Publication number
JP4825891B2
JP4825891B2 JP2009086917A JP2009086917A JP4825891B2 JP 4825891 B2 JP4825891 B2 JP 4825891B2 JP 2009086917 A JP2009086917 A JP 2009086917A JP 2009086917 A JP2009086917 A JP 2009086917A JP 4825891 B2 JP4825891 B2 JP 4825891B2
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Prior art keywords
pattern
template
mask
closed loop
manufacturing
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Expired - Fee Related
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JP2009086917A
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English (en)
Japanese (ja)
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JP2010239009A5 (enExample
JP2010239009A (ja
Inventor
耕治 橋本
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Toshiba Corp
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Toshiba Corp
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Priority to JP2009086917A priority Critical patent/JP4825891B2/ja
Priority to US12/683,876 priority patent/US8222150B2/en
Priority to KR1020100019975A priority patent/KR101182885B1/ko
Publication of JP2010239009A publication Critical patent/JP2010239009A/ja
Publication of JP2010239009A5 publication Critical patent/JP2010239009A5/ja
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0035Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C59/00Surface shaping of articles, e.g. embossing; Apparatus therefor
    • B29C59/02Surface shaping of articles, e.g. embossing; Apparatus therefor by mechanical means, e.g. pressing
    • B29C59/022Surface shaping of articles, e.g. embossing; Apparatus therefor by mechanical means, e.g. pressing characterised by the disposition or the configuration, e.g. dimensions, of the embossments or the shaping tools therefor
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/70508Data handling in all parts of the microlithographic apparatus, e.g. handling pattern data for addressable masks or data transfer to or from different components within the exposure apparatus
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/706835Metrology information management or control
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10P50/691
    • H10P74/203

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Mechanical Engineering (AREA)
  • Shaping Of Tube Ends By Bending Or Straightening (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP2009086917A 2009-03-31 2009-03-31 半導体装置の製造方法およびテンプレート Expired - Fee Related JP4825891B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009086917A JP4825891B2 (ja) 2009-03-31 2009-03-31 半導体装置の製造方法およびテンプレート
US12/683,876 US8222150B2 (en) 2009-03-31 2010-01-07 Method of manufacturing semiconductor device, template, and method of creating pattern inspection data
KR1020100019975A KR101182885B1 (ko) 2009-03-31 2010-03-05 반도체 장치 제조 방법, 템플릿, 및 패턴 검사 데이터 생성 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009086917A JP4825891B2 (ja) 2009-03-31 2009-03-31 半導体装置の製造方法およびテンプレート

Related Child Applications (1)

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JP2011167069A Division JP5337207B2 (ja) 2011-07-29 2011-07-29 パターン検査データの作成方法

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JP2010239009A JP2010239009A (ja) 2010-10-21
JP2010239009A5 JP2010239009A5 (enExample) 2011-06-23
JP4825891B2 true JP4825891B2 (ja) 2011-11-30

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US (1) US8222150B2 (enExample)
JP (1) JP4825891B2 (enExample)
KR (1) KR101182885B1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014103615A1 (ja) * 2012-12-28 2014-07-03 大日本印刷株式会社 ナノインプリントモールドの製造方法
JP2014187257A (ja) * 2013-03-25 2014-10-02 Dainippon Printing Co Ltd ナノインプリントモールドの製造方法

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5173944B2 (ja) * 2009-06-16 2013-04-03 キヤノン株式会社 インプリント装置及び物品の製造方法
JP5275208B2 (ja) * 2009-12-02 2013-08-28 株式会社東芝 半導体装置の製造方法
JP5337114B2 (ja) * 2010-07-30 2013-11-06 株式会社東芝 パタン形成方法
CN102468136A (zh) * 2010-11-19 2012-05-23 中芯国际集成电路制造(上海)有限公司 双重图形化方法
JP2013065772A (ja) 2011-09-20 2013-04-11 Toshiba Corp 半導体装置の製造方法
JP6324318B2 (ja) * 2011-12-19 2018-05-16 キャノン・ナノテクノロジーズ・インコーポレーテッド インプリントリソグラフィー用のシームレスな大面積マスターテンプレートの製造方法
JP5899931B2 (ja) * 2012-01-06 2016-04-06 大日本印刷株式会社 ナノインプリント用テンプレート及びその製造方法
JP6142539B2 (ja) * 2012-01-20 2017-06-07 東レ株式会社 成形材料
JP6127535B2 (ja) * 2012-02-03 2017-05-17 大日本印刷株式会社 ナノインプリント用テンプレートの製造方法
JP6089451B2 (ja) * 2012-05-30 2017-03-08 大日本印刷株式会社 ナノインプリントモールドおよびその製造方法
JP6236918B2 (ja) * 2012-06-26 2017-11-29 大日本印刷株式会社 ナノインプリント用テンプレートの製造方法
JP6019967B2 (ja) * 2012-09-10 2016-11-02 大日本印刷株式会社 パターン形成方法
JP6019966B2 (ja) * 2012-09-10 2016-11-02 大日本印刷株式会社 パターン形成方法
JP2014079903A (ja) * 2012-10-15 2014-05-08 Hoya Corp インプリント用モールドの製造方法
JP6357753B2 (ja) * 2012-10-30 2018-07-18 大日本印刷株式会社 ナノインプリントモールドの製造方法
JP5983322B2 (ja) * 2012-11-05 2016-08-31 大日本印刷株式会社 パターン構造体の形成方法
JP6003571B2 (ja) * 2012-11-21 2016-10-05 大日本印刷株式会社 ナノインプリント用テンプレートの製造方法
JP6136271B2 (ja) * 2013-01-08 2017-05-31 大日本印刷株式会社 インプリントモールドの製造方法
JP6127517B2 (ja) * 2013-01-08 2017-05-17 大日本印刷株式会社 インプリントモールドの製造方法
JP6115245B2 (ja) * 2013-03-28 2017-04-19 大日本印刷株式会社 ナノインプリント用テンプレートおよびその製造方法
JP6232731B2 (ja) * 2013-04-16 2017-11-22 大日本印刷株式会社 インプリントモールドの製造方法
JP6136721B2 (ja) * 2013-08-01 2017-05-31 大日本印刷株式会社 パターン形成方法及びインプリントモールドの製造方法
JP6156013B2 (ja) * 2013-09-24 2017-07-05 大日本印刷株式会社 インプリントモールドの製造方法
JP6565415B2 (ja) * 2015-07-22 2019-08-28 大日本印刷株式会社 インプリントモールド製造用の基板およびインプリントモールドの製造方法
JP2018531506A (ja) * 2015-09-24 2018-10-25 東京エレクトロン株式会社 サブ解像度基板パターニングのためのエッチングマスクを形成する方法
JP6183519B2 (ja) * 2016-08-26 2017-08-23 大日本印刷株式会社 ナノインプリント用テンプレートの製造方法
JP6311769B2 (ja) * 2016-10-24 2018-04-18 大日本印刷株式会社 ナノインプリント用テンプレート
KR101907039B1 (ko) * 2016-11-04 2018-12-05 한국과학기술연구원 신뢰성 있는 동작 지표, 소자 간 균일성 및 다중 레벨 데이터 저장 특성을 갖는 비휘발성 저항 변화 메모리 소자 및 이의 제조방법
KR102617139B1 (ko) * 2018-04-09 2023-12-26 삼성전자주식회사 반도체 소자 및 그 제조방법
JP2020047634A (ja) 2018-09-14 2020-03-26 キオクシア株式会社 パターン形成方法、マスタテンプレートおよびテンプレートの製造方法
JP2021153133A (ja) 2020-03-24 2021-09-30 キオクシア株式会社 パターン形成方法およびテンプレートの製造方法

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JP2007144995A (ja) 2005-10-25 2007-06-14 Dainippon Printing Co Ltd 光硬化ナノインプリント用モールド及びその製造方法
JP4774937B2 (ja) 2005-11-10 2011-09-21 大日本印刷株式会社 テンプレートの製造方法
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WO2008032416A1 (fr) * 2006-09-15 2008-03-20 Hitachi High-Technologies Corporation Puce d'alignement pour une mesure d'aberration ponctuelle de microscope électronique à balayage
JP2008218690A (ja) 2007-03-05 2008-09-18 Seiko Epson Corp 半導体装置の製造方法及びテンプレート
KR100876805B1 (ko) * 2007-05-14 2009-01-09 주식회사 하이닉스반도체 나노 임프린트 리소그라피 공정용 템플릿 및 이를 이용한 반도체 소자 제조 방법

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WO2014103615A1 (ja) * 2012-12-28 2014-07-03 大日本印刷株式会社 ナノインプリントモールドの製造方法
KR20150100610A (ko) * 2012-12-28 2015-09-02 다이니폰 인사츠 가부시키가이샤 나노임프린트 몰드의 제조 방법
JPWO2014103615A1 (ja) * 2012-12-28 2017-01-12 大日本印刷株式会社 ナノインプリントモールドの製造方法
US9586343B2 (en) 2012-12-28 2017-03-07 Dai Nippon Printing Co., Ltd. Method for producing nanoimprint mold
KR102052465B1 (ko) 2012-12-28 2019-12-05 다이니폰 인사츠 가부시키가이샤 나노임프린트 몰드의 제조 방법
JP2014187257A (ja) * 2013-03-25 2014-10-02 Dainippon Printing Co Ltd ナノインプリントモールドの製造方法

Also Published As

Publication number Publication date
KR20100109374A (ko) 2010-10-08
KR101182885B1 (ko) 2012-09-13
US20100248482A1 (en) 2010-09-30
JP2010239009A (ja) 2010-10-21
US8222150B2 (en) 2012-07-17

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