JP4817924B2 - 半導体パッケージ - Google Patents
半導体パッケージ Download PDFInfo
- Publication number
- JP4817924B2 JP4817924B2 JP2006091162A JP2006091162A JP4817924B2 JP 4817924 B2 JP4817924 B2 JP 4817924B2 JP 2006091162 A JP2006091162 A JP 2006091162A JP 2006091162 A JP2006091162 A JP 2006091162A JP 4817924 B2 JP4817924 B2 JP 4817924B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency signal
- signal line
- base substrate
- microstrip line
- semiconductor package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0007—Casings
- H05K9/0056—Casings specially adapted for microwave applications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6611—Wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/6655—Matching arrangements, e.g. arrangement of inductive and capacitive components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Waveguides (AREA)
- Semiconductor Lasers (AREA)
- Details Of Connecting Devices For Male And Female Coupling (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006091162A JP4817924B2 (ja) | 2006-03-29 | 2006-03-29 | 半導体パッケージ |
| US11/535,311 US20070230145A1 (en) | 2006-03-29 | 2006-09-26 | Semiconductor package |
| US12/353,100 US7838990B2 (en) | 2006-03-29 | 2009-01-13 | High-frequency hermetically-sealed circuit package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006091162A JP4817924B2 (ja) | 2006-03-29 | 2006-03-29 | 半導体パッケージ |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007266417A JP2007266417A (ja) | 2007-10-11 |
| JP2007266417A5 JP2007266417A5 (enExample) | 2009-04-16 |
| JP4817924B2 true JP4817924B2 (ja) | 2011-11-16 |
Family
ID=38558611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006091162A Expired - Fee Related JP4817924B2 (ja) | 2006-03-29 | 2006-03-29 | 半導体パッケージ |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US20070230145A1 (enExample) |
| JP (1) | JP4817924B2 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4903738B2 (ja) * | 2007-03-28 | 2012-03-28 | 京セラ株式会社 | 電子部品収納用パッケージおよび電子装置 |
| AU323139S (en) * | 2008-05-15 | 2008-12-11 | Tyco Electronics Services Gmbh | Printed circuit board |
| CN102007823B (zh) * | 2008-05-15 | 2013-09-25 | Adc有限公司 | 电连接器和用于电连接器的电路板 |
| JP4982596B2 (ja) * | 2009-09-08 | 2012-07-25 | 株式会社東芝 | モジュールの接続構造 |
| JP6375584B2 (ja) * | 2014-03-31 | 2018-08-22 | 住友電工デバイス・イノベーション株式会社 | 電子部品搭載用パッケージ |
| JP6591912B2 (ja) * | 2016-02-25 | 2019-10-16 | 京セラ株式会社 | 半導体素子パッケージおよび半導体装置 |
| JP6412900B2 (ja) * | 2016-06-23 | 2018-10-24 | 株式会社東芝 | 高周波半導体用パッケージ |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3784884A (en) * | 1972-11-03 | 1974-01-08 | Motorola Inc | Low parasitic microwave package |
| US4150393A (en) * | 1975-09-29 | 1979-04-17 | Motorola, Inc. | High frequency semiconductor package |
| JPS596513B2 (ja) * | 1978-12-28 | 1984-02-13 | 富士通株式会社 | マイクロ波装置モジユ−ル |
| JPS60210853A (ja) * | 1984-03-06 | 1985-10-23 | Fujitsu Ltd | 半導体装置 |
| US4626805A (en) * | 1985-04-26 | 1986-12-02 | Tektronix, Inc. | Surface mountable microwave IC package |
| JPH0720919Y2 (ja) * | 1987-01-22 | 1995-05-15 | 日本電信電話株式会社 | マイクロ波集積回路用パツケ−ジ |
| JPH0390503U (enExample) * | 1989-12-29 | 1991-09-13 | ||
| JPH05121913A (ja) * | 1991-10-24 | 1993-05-18 | Shinko Electric Ind Co Ltd | 高周波素子用パツケージ |
| US5406120A (en) * | 1992-10-20 | 1995-04-11 | Jones; Robert M. | Hermetically sealed semiconductor ceramic package |
| JPH1174396A (ja) * | 1997-08-28 | 1999-03-16 | Kyocera Corp | 高周波用入出力端子ならびに高周波用半導体素子収納用パッケージ |
| US6441697B1 (en) * | 1999-01-27 | 2002-08-27 | Kyocera America, Inc. | Ultra-low-loss feedthrough for microwave circuit package |
| JP3460631B2 (ja) * | 1999-07-23 | 2003-10-27 | 株式会社日立製作所 | 高周波半導体素子 |
| JP3328235B2 (ja) * | 1999-08-17 | 2002-09-24 | 山形日本電気株式会社 | 半導体装置用セラミックパッケージ |
| JP3996330B2 (ja) * | 1999-08-31 | 2007-10-24 | 株式会社住友金属エレクトロデバイス | 高周波パッケージ |
| JP2001156196A (ja) * | 1999-09-17 | 2001-06-08 | Toshiba Corp | 高周波パッケージおよびその製造方法 |
| JP3771853B2 (ja) * | 2002-02-22 | 2006-04-26 | 京セラ株式会社 | 入出力端子および半導体素子収納用パッケージ |
-
2006
- 2006-03-29 JP JP2006091162A patent/JP4817924B2/ja not_active Expired - Fee Related
- 2006-09-26 US US11/535,311 patent/US20070230145A1/en not_active Abandoned
-
2009
- 2009-01-13 US US12/353,100 patent/US7838990B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007266417A (ja) | 2007-10-11 |
| US7838990B2 (en) | 2010-11-23 |
| US20070230145A1 (en) | 2007-10-04 |
| US20090127675A1 (en) | 2009-05-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100430299B1 (ko) | 다층 기판 상의 고주파 회로 모듈 | |
| JP5443594B2 (ja) | チップから導波管ポートへの変換器 | |
| US8242588B2 (en) | Lead frame based ceramic air cavity package | |
| JP4125570B2 (ja) | 電子装置 | |
| EP2787530B1 (en) | High-frequency semiconductor package and high-frequency semiconductor device | |
| WO2017090651A1 (ja) | 電子部品搭載用パッケージおよび電子装置 | |
| JP2014183142A (ja) | 半導体装置、半導体装置の製造方法 | |
| US10777493B2 (en) | Semiconductor device mounting board and semiconductor package | |
| KR20090015823A (ko) | 반도체 장치, 리드 프레임 및 그 마이크로폰 패키지 | |
| US7838990B2 (en) | High-frequency hermetically-sealed circuit package | |
| JP2008244289A (ja) | 電磁シールド構造 | |
| JP4527646B2 (ja) | 電子装置 | |
| JP6825986B2 (ja) | 配線基板、電子部品収納用パッケージおよび電子装置 | |
| JP4903738B2 (ja) | 電子部品収納用パッケージおよび電子装置 | |
| JP6958396B2 (ja) | フレキシブル基板及び光デバイス | |
| JP6579396B2 (ja) | 半導体装置、及び基板 | |
| JP2002299502A (ja) | 高周波半導体素子収納用パッケージ | |
| JP3686855B2 (ja) | 回路基板および半導体素子収納用パッケージ並びにそれを用いた半導体装置 | |
| JP2004022956A (ja) | 半導体素子収納用パッケージおよび半導体装置 | |
| US20240234355A1 (en) | Module | |
| JP6671567B1 (ja) | 光モジュール | |
| JP4127652B2 (ja) | 光モジュール | |
| JP2020120076A (ja) | 電子部品用パッケージおよび電子装置 | |
| JP4563980B2 (ja) | 表面実装型パッケージ及び半導体装置 | |
| WO2019207657A1 (ja) | 半導体装置および半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090227 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090227 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110513 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110517 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110714 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110803 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110830 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140909 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140909 Year of fee payment: 3 |
|
| LAPS | Cancellation because of no payment of annual fees |