JP4473235B2 - 漏洩電流を減少させる液晶表示素子及びその製造方法 - Google Patents
漏洩電流を減少させる液晶表示素子及びその製造方法 Download PDFInfo
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- JP4473235B2 JP4473235B2 JP2006176660A JP2006176660A JP4473235B2 JP 4473235 B2 JP4473235 B2 JP 4473235B2 JP 2006176660 A JP2006176660 A JP 2006176660A JP 2006176660 A JP2006176660 A JP 2006176660A JP 4473235 B2 JP4473235 B2 JP 4473235B2
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- 239000004973 liquid crystal related substance Substances 0.000 title claims description 48
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 70
- 239000010410 layer Substances 0.000 claims description 53
- 239000000758 substrate Substances 0.000 claims description 39
- 238000000034 method Methods 0.000 claims description 31
- 230000001681 protective effect Effects 0.000 claims description 10
- 239000011241 protective layer Substances 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 238000000926 separation method Methods 0.000 claims description 4
- 238000009832 plasma treatment Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 239000010408 film Substances 0.000 description 19
- 239000010409 thin film Substances 0.000 description 12
- 239000011159 matrix material Substances 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 206010047571 Visual impairment Diseases 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
図面に示されたように、本発明の第1実施形態に係る液晶表示素子100は、透明な基板120上に第1方向に配列された複数のゲートライン104と、これらゲートライン104と垂直に配列されて複数の画素(P)を定義する複数のデータライン106と、前記ゲートライン104とデータライン106の交差領域に形成された薄膜トランジスタ(TFT)と、を含む。この時、前記薄膜トランジスタ(TFT)は、ゲートラインから引出されたゲート電極103と、該ゲート電極103上に形成された前記データライン106の下部に形成された半導体パターン108aと離隔されて形成された半導体層108と、前記ゲート電極103と対応する半導体層108上に形成されたソース電極及びドレイン電極105a、105bと、を含む。
105b、205b、305b:ドレイン電極
106、206、306:データライン
108、208、308:半導体層
108a、208a、308a:半導体パターン
110a、210a、310a:連結パターン
Claims (8)
- 第1及び第2基板と、
前記第1基板上に第1方向に配列された複数のゲートラインと、
前記ゲートラインと連結されたゲート電極と、
前記ゲートラインと垂直に交差して複数の画素を定義する複数のデータラインと、
前記ゲート電極上に形成され、前記データラインと所定間隔離隔されたソース電極及びドレイン電極と、
前記画素領域に形成され、前記ドレイン電極と電気的に連結された画素電極と、
一方側が前記データラインの側部と接触し、他方側が前記ソース電極の側部と接触して前記データラインとソース電極を電気的に連結する連結パターンと、
前記ゲート電極とソース/ドレイン電極の間に介在する半導体層と、
前記ソース電極とドレイン電極の離隔領域に形成された保護膜と、
前記第1及び第2基板の間に形成された液晶層と、を含むことを特徴とする液晶表示素子。
- 前記データラインと対応する領域に半導体パターンが形成されることを特徴とする請求項1記載の液晶表示素子。
- 前記ゲート電極と半導体層の間に形成されたゲート絶縁膜を更に含むことを特徴とする請求項1記載の液晶表示素子。
- 前記ソース電極は、U字状であることを特徴とする請求項1記載の液晶表示素子。
- 前記ドレイン電極は、ドレインコンタクトホールを通して画素電極と電気的に接続されることを特徴とする請求項1記載の液晶表示素子。
- 前記画素電極の一方側が前記ドレイン電極の側部と接触することを特徴とする請求項1記載の液晶表示素子。
- 前記保護膜は、SiOxで形成されることを特徴とする請求項1記載の液晶表示素子。
- 第1基板及び第2基板を準備する段階と、
前記第1基板上に第1方向に配列される複数のゲートライン及びゲート電極を形成する段階と、
ゲートラインが形成された第1基板上にゲート絶縁膜を形成する段階と、
半導体物質及びその上のPRパターンを形成し、前記PRパターンにより半導体物質をエッチングして半導体パターン及び半導体層を形成する段階と、
PRパターンが形成された第1基板に透明な伝導性物質を積層する段階と、
前記PRパターンを除去して前記第1基板上に画素電極及び連結パターンを形成する段階と、
前記第1基板上に前記ゲートラインと垂直に交差して複数の画素領域を定義する複数のデータラインと、これらデータラインと所定間隔離隔され、前記連結パターンと側部に接続されて前記連結パターンを通じて前記データラインと接触するソース電極及び前記画素電極と接触するドレイン電極を形成する段階と、
前記第1基板上に保護層を形成した後、O2プラズマ処理によりソース電極とドレイン電極間の離隔領域以外の領域の保護層を除去する段階と、
前記第1基板と第2基板の間に液晶層を形成する段階と、を含むことを特徴とする液晶表示素子の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050055963A KR101152528B1 (ko) | 2005-06-27 | 2005-06-27 | 누설전류를 줄일 수 있는 액정표시소자 및 그 제조방법 |
Publications (2)
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JP2007011351A JP2007011351A (ja) | 2007-01-18 |
JP4473235B2 true JP4473235B2 (ja) | 2010-06-02 |
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JP2006176660A Expired - Fee Related JP4473235B2 (ja) | 2005-06-27 | 2006-06-27 | 漏洩電流を減少させる液晶表示素子及びその製造方法 |
Country Status (6)
Country | Link |
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US (1) | US8134155B2 (ja) |
JP (1) | JP4473235B2 (ja) |
KR (1) | KR101152528B1 (ja) |
CN (1) | CN100454122C (ja) |
DE (1) | DE102006028320B4 (ja) |
TW (1) | TWI337406B (ja) |
Families Citing this family (16)
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CN100428039C (zh) * | 2005-11-23 | 2008-10-22 | 北京京东方光电科技有限公司 | 一种tft lcd像素结构 |
WO2007088722A1 (ja) * | 2006-01-31 | 2007-08-09 | Idemitsu Kosan Co., Ltd. | Tft基板及び反射型tft基板並びにそれらの製造方法 |
KR101330399B1 (ko) * | 2007-02-02 | 2013-11-15 | 엘지디스플레이 주식회사 | 액정 표시 장치용 박막 트랜지스터 소자 및 그의 제조 방법 |
US9176353B2 (en) | 2007-06-29 | 2015-11-03 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device |
US7738050B2 (en) | 2007-07-06 | 2010-06-15 | Semiconductor Energy Laboratory Co., Ltd | Liquid crystal display device |
US7897971B2 (en) * | 2007-07-26 | 2011-03-01 | Semiconductor Energy Laboratory Co., Ltd. | Display device |
US8786793B2 (en) * | 2007-07-27 | 2014-07-22 | Semiconductor Energy Laboratory Co., Ltd. | Display device and manufacturing method thereof |
JP2009105390A (ja) * | 2007-10-05 | 2009-05-14 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
JP5377940B2 (ja) * | 2007-12-03 | 2013-12-25 | 株式会社半導体エネルギー研究所 | 半導体装置 |
JP5615605B2 (ja) * | 2010-07-05 | 2014-10-29 | 三菱電機株式会社 | Ffsモード液晶装置 |
JP2012053372A (ja) * | 2010-09-03 | 2012-03-15 | Hitachi Displays Ltd | 液晶表示装置 |
KR101789236B1 (ko) | 2010-12-24 | 2017-10-24 | 삼성디스플레이 주식회사 | 박막 트랜지스터 및 평판 표시 장치 |
CN103187423B (zh) * | 2013-02-04 | 2016-03-23 | 合肥京东方光电科技有限公司 | 一种氧化物薄膜晶体管阵列基板及其制作方法、显示面板 |
CN203983289U (zh) * | 2014-06-17 | 2014-12-03 | 京东方科技集团股份有限公司 | 薄膜晶体管、阵列基板及显示装置 |
CN104752345B (zh) * | 2015-04-27 | 2018-01-30 | 深圳市华星光电技术有限公司 | 薄膜晶体管阵列基板及其制作方法 |
CN105870197A (zh) * | 2016-04-21 | 2016-08-17 | 京东方科技集团股份有限公司 | 薄膜晶体管及制备方法、阵列基板、显示装置 |
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JP3002099B2 (ja) | 1994-10-13 | 2000-01-24 | 株式会社フロンテック | 薄膜トランジスタおよびそれを用いた液晶表示装置 |
JP3716580B2 (ja) * | 1997-02-27 | 2005-11-16 | セイコーエプソン株式会社 | 液晶装置及びその製造方法、並びに投写型表示装置 |
JPH1140814A (ja) * | 1997-07-18 | 1999-02-12 | Furontetsuku:Kk | 薄膜トランジスタ基板と液晶表示装置および薄膜トランジスタ基板の製造方法 |
JP4100655B2 (ja) * | 1999-12-21 | 2008-06-11 | エルジー.フィリップス エルシーデー カンパニー,リミテッド | 薄膜トランジスタの製造方法 |
JP4211250B2 (ja) * | 2000-10-12 | 2009-01-21 | セイコーエプソン株式会社 | トランジスタ及びそれを備える表示装置 |
KR100743101B1 (ko) * | 2001-05-07 | 2007-07-27 | 엘지.필립스 엘시디 주식회사 | 액정표시장치 및 그 제조방법과 이를 이용한 화소리페어방법 |
JP4604440B2 (ja) * | 2002-02-22 | 2011-01-05 | 日本電気株式会社 | チャネルエッチ型薄膜トランジスタ |
JP4551049B2 (ja) | 2002-03-19 | 2010-09-22 | 三菱電機株式会社 | 表示装置 |
JP2004342923A (ja) * | 2003-05-16 | 2004-12-02 | Seiko Epson Corp | 液晶装置、アクティブマトリクス基板、表示装置、及び電子機器 |
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2005
- 2005-06-27 KR KR1020050055963A patent/KR101152528B1/ko not_active IP Right Cessation
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2006
- 2006-06-20 DE DE102006028320.1A patent/DE102006028320B4/de not_active Expired - Fee Related
- 2006-06-26 CN CNB2006100947007A patent/CN100454122C/zh not_active Expired - Fee Related
- 2006-06-26 US US11/474,356 patent/US8134155B2/en not_active Expired - Fee Related
- 2006-06-27 JP JP2006176660A patent/JP4473235B2/ja not_active Expired - Fee Related
- 2006-06-27 TW TW095123466A patent/TWI337406B/zh not_active IP Right Cessation
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Publication number | Publication date |
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CN100454122C (zh) | 2009-01-21 |
DE102006028320A1 (de) | 2006-12-28 |
KR101152528B1 (ko) | 2012-06-01 |
TW200709426A (en) | 2007-03-01 |
US20060289867A1 (en) | 2006-12-28 |
JP2007011351A (ja) | 2007-01-18 |
DE102006028320B4 (de) | 2014-05-22 |
KR20070000546A (ko) | 2007-01-03 |
US8134155B2 (en) | 2012-03-13 |
CN1892386A (zh) | 2007-01-10 |
TWI337406B (en) | 2011-02-11 |
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