JP4376388B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4376388B2 JP4376388B2 JP35275799A JP35275799A JP4376388B2 JP 4376388 B2 JP4376388 B2 JP 4376388B2 JP 35275799 A JP35275799 A JP 35275799A JP 35275799 A JP35275799 A JP 35275799A JP 4376388 B2 JP4376388 B2 JP 4376388B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor
- insulating layer
- semiconductor device
- back surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35275799A JP4376388B2 (ja) | 1999-12-13 | 1999-12-13 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35275799A JP4376388B2 (ja) | 1999-12-13 | 1999-12-13 | 半導体装置 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008270224A Division JP2009016882A (ja) | 2008-10-20 | 2008-10-20 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001168231A JP2001168231A (ja) | 2001-06-22 |
| JP2001168231A5 JP2001168231A5 (enExample) | 2007-01-18 |
| JP4376388B2 true JP4376388B2 (ja) | 2009-12-02 |
Family
ID=18426242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35275799A Expired - Lifetime JP4376388B2 (ja) | 1999-12-13 | 1999-12-13 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4376388B2 (enExample) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4754105B2 (ja) * | 2001-07-04 | 2011-08-24 | パナソニック株式会社 | 半導体装置およびその製造方法 |
| DE10137184B4 (de) * | 2001-07-31 | 2007-09-06 | Infineon Technologies Ag | Verfahren zur Herstellung eines elektronischen Bauteils mit einem Kuststoffgehäuse und elektronisches Bauteil |
| JP2003068736A (ja) * | 2001-08-24 | 2003-03-07 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| CN100461391C (zh) * | 2002-02-04 | 2009-02-11 | 卡西欧计算机株式会社 | 半导体装置 |
| TW577160B (en) | 2002-02-04 | 2004-02-21 | Casio Computer Co Ltd | Semiconductor device and manufacturing method thereof |
| EP1527480A2 (en) | 2002-08-09 | 2005-05-04 | Casio Computer Co., Ltd. | Semiconductor device and method of manufacturing the same |
| US7187060B2 (en) | 2003-03-13 | 2007-03-06 | Sanyo Electric Co., Ltd. | Semiconductor device with shield |
| JP4346333B2 (ja) * | 2003-03-26 | 2009-10-21 | 新光電気工業株式会社 | 半導体素子を内蔵した多層回路基板の製造方法 |
| JP3929966B2 (ja) | 2003-11-25 | 2007-06-13 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| JP2006032598A (ja) * | 2004-07-15 | 2006-02-02 | Renesas Technology Corp | 半導体装置の製造方法および半導体装置 |
| WO2006008795A1 (ja) * | 2004-07-16 | 2006-01-26 | Shinko Electric Industries Co., Ltd. | 半導体装置の製造方法 |
| JP4607531B2 (ja) * | 2004-09-29 | 2011-01-05 | カシオマイクロニクス株式会社 | 半導体装置の製造方法 |
| KR100700395B1 (ko) * | 2005-04-25 | 2007-03-28 | 신꼬오덴기 고교 가부시키가이샤 | 반도체 장치의 제조 방법 |
| JP2006339189A (ja) * | 2005-05-31 | 2006-12-14 | Oki Electric Ind Co Ltd | 半導体ウェハおよびそれにより形成した半導体装置 |
| CN101847611B (zh) | 2005-06-29 | 2012-05-23 | 罗姆股份有限公司 | 半导体装置 |
| JP2007012756A (ja) * | 2005-06-29 | 2007-01-18 | Rohm Co Ltd | 半導体装置 |
| JP5266009B2 (ja) * | 2008-10-14 | 2013-08-21 | 株式会社フジクラ | 部品内蔵形回路配線基板 |
| JP5175803B2 (ja) | 2009-07-01 | 2013-04-03 | 新光電気工業株式会社 | 半導体装置の製造方法 |
-
1999
- 1999-12-13 JP JP35275799A patent/JP4376388B2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001168231A (ja) | 2001-06-22 |
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